DM9010
Single Chip Ethernet Controller with General Processor Interface
Content
1. GENERAL DESCRIPTION.............................................................................................................................................. 7
2. BLOCK DIAGRAM........................................................................................................................................................... 7
3. FEATURES......................................................................................................................................................................... 8
4. PIN CONFIGURATION ................................................................................................................................................... 9
4.1 PIN CONFIGURATION I: WITH MII INTERFACE................................................................................................................. 9
4.2 PIN CONFIGURATION II: WITH 32-BIT DATA BUS ......................................................................................................... 10
5. PIN DESCRIPTION......................................................................................................................................................... 11
5.1 MII INTERFACE............................................................................................................................................................. 11
5.2 PROCESSOR INTERFACE ................................................................................................................................................ 11
5.3 EEPROM INTERFACE................................................................................................................................................... 12
5.4 CLOCK INTERFACE........................................................................................................................................................ 13
5.5 LED INTERFACE ........................................................................................................................................................... 13
5.6 10/100 PHY/FIBER ....................................................................................................................................................... 13
5.7 MISCELLANEOUS .......................................................................................................................................................... 14
5.8 POWER PINS.................................................................................................................................................................. 14
5.9 STRAP PINS TABLE......................................................................................................................................................... 14
6. VENDOR CONTROL AND STATUS REGISTER SET.............................................................................................. 15
6.1 NETWORK CONTROL REGISTER (00H).......................................................................................................................... 17
6.2 NETWORK STATUS REGISTER (01H)............................................................................................................................. 17
6.3 TX CONTROL REGISTER (02H)..................................................................................................................................... 17
6.4 TX STATUS REGISTER I ( 03H ) FOR PACKET INDEX I.................................................................................................... 18
6.5 TX STATUS REGISTER II ( 04H ) FOR PACKET INDEX I I................................................................................................ 18
6.6 RX CONTROL REGISTER ( 05H ) ................................................................................................................................... 18
6.7 RX STATUS REGISTER ( 06H ) ...................................................................................................................................... 19
6.8 RECEIVE OVERFLOW COUNTER REGISTER ( 07H )........................................................................................................ 19
6.9 BACK PRESSURE THRESHOLD REGISTER (08H) ............................................................................................................ 19
6.10 FLOW CONTROL THRESHOLD REGISTER ( 09H ) ......................................................................................................... 20
6.11 RX/TX FLOW CONTROL REGISTER ( 0AH )................................................................................................................ 20
6.12 EEPROM & PHY CONTROL REGISTER ( 0BH ) ......................................................................................................... 21
Preliminary
2
Version: DM9010-17--DS-P04
Jan. 18, 2006
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
