DM9000BI
Industrial-grade Ethernet Controller with General Processor Interface
6. Vendor Control and Status Register Set
The DM9000BI implements several control and status
registers, which can be accessed by the host. These CSRs
are byte aligned. All CSRs are set to their default values by
hardware or software reset unless they are specified
Default value
after reset
00H
00H
00H
00H
00H
00H
00H
00H
37H
38H
00H
00H
40H
XXH
XXH
00H
Determined by
EEPROM
XXH
01H
XXH
00H
00H
Register
Description
Network Control Register
Network Status Register
TX Control Register
TX Status Register I
TX Status Register II
RX Control Register
RX Status Register
Receive Overflow Counter Register
Back Pressure Threshold Register
Flow Control Threshold Register
RX Flow Control Register
EEPROM & PHY Control Register
EEPROM & PHY Address Register
EEPROM & PHY Low Byte Data Register
EEPROM & PHY High Byte Data Register
Wake Up Control Register (in 8-bit mode)
Physical Address Register
Offset
NCR
NSR
TCR
TSR I
TSR II
RCR
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H-15H
RSR
ROCR
BPTR
FCTR
FCR
EPCR
EPAR
EPDRL
EPDRH
WCR
PAR
MAR
GPCR
GPR
TRPAL
TRPAH
RWPAL
RWPAH
VID
Multicast Address Register
General Purpose Control Register (in 8-bit mode)
General Purpose Register
TX SRAM Read Pointer Address Low Byte
TX SRAM Read Pointer Address High Byte
RX SRAM Write Pointer Address Low Byte
RX SRAM Write Pointer Address High Byte
Vendor ID
Product ID
CHIP Revision
TX Control Register 2
Operation Control Register
16H-1DH
1EH
1FH
22H
23H
24H
00H
25H
0CH
0A46H
9000H
1AH
00H
28H-29H
2AH-2BH
2CH
2DH
2EH
PID
CHIPR
TCR2
OCR
00H
SMCR
ETXCSR
TCSCR
RCSCSR
MPAR
LEDCR
BUSCR
INTCR
SCCR
Special Mode Control Register
Early Transmit Control/Status Register
Transmit Check Sum Control Register
Receive Check Sum Control Status Register
MII PHY Address Register
LED Pin Control Register
Processor Bus Control Register
INT Pin Control Register
2FH
30H
31H
32H
33H
34H
38H
39H
00H
00H
00H
00H
00H
00H
01H
00H
System Clock Turn ON Control Register
50H
00H
Preliminary
13
Version: DM9000BI-13-DS-P02
January 17, 2008
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
