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DM9000BIEP 参数 Datasheet PDF下载

DM9000BIEP图片预览
型号: DM9000BIEP
PDF下载: 下载PDF文件 查看货源
内容描述: 工业级以太网控制器与通用处理器接口 [Industrial-grade Ethernet Controller with General Processor Interface]
分类和应用: 控制器以太网
文件页数/大小: 56 页 / 443 K
品牌: DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
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DM9000BI  
Industrial-grade Ethernet Controller with General Processor Interface  
5. Pin Description  
I = Input  
O = Output  
I/O = Input/Output  
O/D = Open Drain  
P = Power  
# = asserted low  
PD = internal pull-low about 60K  
5.1 Processor Interface  
Pin No.  
Pin Name  
Type  
Description  
Processor Read Command  
35  
IOR#  
I,PD This pin is low active at default, its polarity can be modified by EEPROM  
setting. See the EEPROM content description for detail  
Processor Write Command  
36  
37  
32  
IOW#  
CS#  
I,PD This pin is low active at default, its polarity can be modified by EEPROM  
setting. See the EEPROM content description for detail  
Chip Select  
A default low active signal used to select the DM9000BI. Its polarity can  
be modified by EEPROM setting. See the EEPROM content description  
I,PD  
for detail.  
Command Type  
CMD  
I,PD When high, the access of this command cycle is DATA port  
When low, the access of this command cycle is INDEX port  
Interrupt Request  
This pin is high active at default, its polarity can be modified by EEPROM  
setting or by strap pin EECK. See the EEPROM content description for  
34  
INT  
O,PD  
detail  
18,17,16,  
14,13,12,  
11,10  
Processor Data Bus bit 0~7  
I/O,PD  
SD0~7  
SD8~15  
Processor Data Bus bit 8~15  
31,29,28,  
27,26,25,  
24,22  
In 16-bit mode, these pins act as the processor data bus bit 8~15;  
When EECS pin is pulled high , they have other definitions. See 8-bit  
I/O,PD  
mode pin description for details.  
5.1.1 8-bit mode pins  
Pin No.  
22  
Pin Name  
WAKE  
Type  
Description  
Issue a wake up signal when wake up event happens  
O,PD  
Full-duplex LED  
In LED mode 1, Its low output indicates that the internal PHY is operated  
in full-duplex mode, or it is floating for the half-duplex mode of the internal  
24  
LED3  
O,PD PHY  
In LED mode 0, Its low output indicates that the internal PHY is operated  
in 10M mode, or it is floating for the 100M mode of the internal PHY  
Note: LED mode is defined in EEPROM setting.  
General Purpose output pins:  
These pins are output only for general purpose that is configured by  
register 1Fh.  
GP6 pin also act as trap pin for the INT output type.  
When GP6 is pulled high, the INT is Open-Drain output type;  
Otherwise it is force output type.  
25,26,27  
GP6~4  
O,PD  
Preliminary  
10  
Version: DM9000BI-13-DS-P02  
January 17, 2008