DM8203
2-port switch with MII / RMII Interface
5.1.3 Reverse MII Interfaces
Pin No.
Pin Name
I/O
Description
2
3
MDC
MDIO
O,PD Reserved
I/O
Reserved
5,6,7,9
TXD2_3~0
O,PD Port 2 MII Transmit Data
4-bit nibble data outputs (synchronous to the TXC2)
10
12
14
15
TXE2
TXC2
TXER2
CRS2
O,PD Port 2 MII Transmit Enable
O
25MHz clock output
O,PD Port 2 MII Transmit Error
O
O
Port 2 carrier sense output when TXE2 or RXDV2
asserted.
Port 2 collision output when TXE2 and RXDV2
asserted.
17
COL2
18
19
20
RXER2
RXC2
RXDV2
I
I
I
I
Port 2 MII Receive Error
Port 2 MII Receive Clock
Port 2 MII Receive Data Valid
Port 2 MII Receive Data
21,22,24,25
RXD2_3~0
4-bit nibble data input (synchronous to RXC2)
5.2 EEPROM Interfaces
Pin No.
Pin Name
I/O
Description
27
28
EEDIO
EECK
I/O
EEPROM Data In/Out
O,PD EEPROM Serial Clock
This pin is used as the clock for the EEPROM data transfer.
EEPROM Chip Selection.
29
EECS
O,PD
5.3 LED Pins
Pin No.
Pin Name
I/O
Description
55
LNK1_LED
O
Port 1 Link / Active LED
It is the combined LED of link and carrier sense signal
of the internal PHY1
56
SPD1_LED
O
Port 1 Speed LED
Its low output indicates that the internal PHY1 is
operated in 100M/S, or it is floating for the 10M mode of
the internal PHY1
57
58
LNK0_LED
SPD0_LED
O
O
Port 0 Link / Active LED
It is the combined LED of link and carrier sense signal
of the internal PHY0
Port 0 Speed LED
Its low output indicates that the internal PHY0 is
operated in 100M/S, or it is floating for the 10M mode of
the internal PHY0
12
Preliminary datasheet
DM8203-15-DS-P05
October 23, 2008
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
