DM8203
2-port switch with MII / RMII Interface
5. Pin Description
I = Input, O = Output, I/O = Input / Output, O/D = Open Drain, P = Power, PD=internal pull-low (about 50K Ohm)
# = asserted Low
5.1 P2 MII / RMII / Reverse MII Interfaces
5.1.1 MII Interfaces
Pin No.
Pin Name
I/O
O,PD MII Serial Management Data Clock
I/O MII Serial Management Data
Description
2
3
MDC
MDIO
5,6,7,9
TXD2_3~0
O,PD Port 2 MII Transmit Data
4-bit nibble data outputs (synchronous to the TXC2)
10
12
TXE2
TXC2
O,PD Port 2 MII Transmit Enable
I/O
Port 2 MII Transmit Clock.
14
15
17
18
19
TXER2
CRS2
COL2
RXER2
RXC2
RXDV2
RXD2_3~0
O,PD Port 2 MII Transmit Error
I/O
I/O
I
I
I
I
Port 2 MII Carrier Sense
Port 2 MII Collision Detect.
Port 2 MII Receive Error
Port 2 MII Receive Clock
Port 2 MII Receive Data Valid
20
21,22,24,25
Port 2 MII Receive Data
4-bit nibble data input (synchronous to RXC2)
5.1.2 RMII Interfaces
Pin No.
Pin Name
I/O
Description
2
3
MDC
MDIO
O,PD MII Serial Management Data Clock
I/O MII Serial Management Data
5,6
7,9
10
TXD2_3~2
TXD2_1~0
TXE2
O,PD Reserved
O,PD RMII Transmit Data
O,PD RMII Transmit Enable.
12
14
15
TXC2
TXER2
CRS2
O
O
I
Reserved
Port 2 MII Transmit Error
RMII CRS_DV
17
18
19
COL2
RXER2
RXC2
I
I
I
Reserved, tie to ground in application.
Reserved, tie to ground in application.
50MHz reference clock.
20
21,22
24,25
RXDV2
RXD2_3~2
RXD2_1~0
I
I
I
Reserved, tie to ground in application.
Reserved, tie to ground in application.
RMII Receive Data.
Preliminarydatasheet
11
DM8203-15-DS-P05
October 23, 2008
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
