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DS2406P+R 参数 Datasheet PDF下载

DS2406P+R图片预览
型号: DS2406P+R
PDF下载: 下载PDF文件 查看货源
内容描述: 双寻址开关与1K位,内存 [Dual Addressable Switch Plus 1kbit Memory]
分类和应用: 开关
文件页数/大小: 31 页 / 350 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
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DS2406  
INITIALIZATION  
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence  
consists of a reset pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the  
slave(s). The presence pulse lets the bus master know that the DS2406 is on the bus and is ready to  
operate. For more details, see the “1-Wire Signaling” section.  
ROM FUNCTION COMMANDS  
Once the bus master has detected a presence, it can issue one of the five ROM function commands that  
the DS2406 supports. All ROM function commands are 8 bits long. A list of these commands follows  
(refer to flowchart in Figure 13).  
Read ROM [33h]  
This command allows the bus master to read the DS2406’s 8-bit family code, unique 48-bit serial  
number, and 8-bit CRC. This command should only be used only if there is a single slave on the bus. If  
more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the  
same time (open drain will produce a wired-AND result). The resultant family code and 48-bit serial  
number will be invalid.  
Match ROM [55h]  
The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a  
specific DS2406 on a multidrop bus. Only the DS2406 that exactly matches the 64-bit ROM sequence  
will respond to the subsequent memory function command. All slaves that do not match the 64-bit ROM  
sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the  
bus.  
Search ROM [F0h]  
When a system is initially brought up, the bus master might not know the number of devices on the  
1-Wire bus or their 64-bit ROM codes. The Search ROM command allows the bus master to use a  
process of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The search ROM  
process is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write  
the desired value of that bit. The bus master performs this 3-step routine on each bit of the ROM. After  
one complete pass, the bus master knows the 64-bit ROM code of one device. Additional passes will  
identify the ROM codes of the remaining devices. See Application Note 187 for a comprehensive  
discussion of a search ROM, including an actual example.  
Skip ROM [CCh]  
This command can save time in a single drop bus system by allowing the bus master to access the  
memory and channel access functions without providing the 64-bit ROM code. If more than one slave is  
present on the bus and, for example, a read command is issued following the Skip ROM command, data  
collision will occur on the bus as multiple slaves transmit simultaneously (open drain pull-downs will  
produce a wired-AND result).  
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