DS2154
FRAMER LOOPBACK
When CCR1.7 is set to a 1, the DS2154 will enter a Framer LoopBack (FLB) mode. See Figure 1-1 for
more details. This loopback is useful in testing and debugging applications. In FLB, the DS2154 will loop
data from the transmit side back to the receive side.
When FLB is enabled, the following will occur:
1. Data will be transmitted as normal at TPOSO and TNEGO.
2. Data input via RPOSI and RNEGI will be ignored.
3. The RCLK output will be replaced with the TCLK input.
CCR2: COMMON CONTROL REGISTER 2 (Address=1A Hex)
(MSB)
(LSB)
ECUS
VCRFS
AAIS
ARA
RSERC
LOTCMC
RFF
RFE
SYMBOL
POSITION NAME AND DESCRIPTION
ECUS
VCRFS
AAIS
CCR2.7
CCR2.6
CCR2.5
CCR2.4
CCR2.3
CCR2.2
Error Counter Update Select. See Section 5 for details.
0=update error counters once a second
1=update error counters every 62.5 ms (500 frames)
VCR Function Select. See Section 5 for details.
0=count BiPolar Violations (BPVs)
1=count Code Violations (CVs)
Automatic AIS Generation.
0=disabled
1=enabled
ARA
Automatic Remote Alarm Generation.
0=disabled
1=enabled
RSERC
LOTCMC
RSER Control.
0=allow RSER to output data as received under all conditions
1=force RSER to 1 under loss of frame alignment conditions
Loss of Transmit Clock Mux Control. Determines whether the
transmit side formatter should switch to the ever-present
RCLKO if the TCLK should fail to transition (see Figure 1-1).
0=do not switch to RCLKO if TCLK stops
1=switch to RCLKO if TCLK stops
RFF
RFE
CCR2.1
CCR2.0
Receive Force Freeze. Freezes receive side signaling at RSIG
(and RSER if CCR3.3=1); will override Receive Freeze Enable
(RFE). See Section 7-2 for details.
0=do not force a freeze event
1=force a freeze event
Receive Freeze Enable. See Section 7-2 for details.
0=no freezing of receive signaling data will occur
1=allow freezing of receive signaling data at RSIG (and RSER if
CCR3.3=1).
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DALLAS [ DALLAS SEMICONDUCTOR ]
