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DS2154LN 参数 Datasheet PDF下载

DS2154LN图片预览
型号: DS2154LN
PDF下载: 下载PDF文件 查看货源
内容描述: 增强型E1单芯片收发器 [Enhanced E1 Single Chip Transceiver]
分类和应用: 数字传输控制器电信集成电路电信电路PC
文件页数/大小: 87 页 / 1103 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
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DS2154  
2.0 PARALLEL PORT  
The DS2154 is controlled via either a non-multiplexed (MUX=0) or a multiplexed (MUX=1) bus by an  
external microcontroller or microprocessor. The DS2154 can operate with either Intel or Motorola bus  
timing configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola  
timing will be selected. All Motorola bus signals are listed in parenthesis (). See the timing diagrams in  
the A.C. Electrical Characteristics in Section 14 for more details.  
3.0 CONTROL, ID AND TEST REGISTERS  
The operation of the DS2154 is configured via a set of nine control registers. Typically, the control  
registers are only accessed when the system is first powered up. Once the DS2154 has been initialized,  
the control registers will only need to be accessed when there is a change in the system configuration.  
There are two Receive Control Registers (RCR1 and RCR2), two Transmit Control Registers (TCR1 and  
TCR2), and five Common Control Registers (CCR1 to CCR5). Each of the nine registers is described in  
this section.  
There is a device IDentification Register (IDR) at address 0FH. The MSB of this read-only register is  
fixed to a 1, indicating that the DS2154 is present. The pin-for-pin compatible T1 version of the DS2154  
also has an ID register at address 0FH and the user can read the MSB to determine which chip is present  
since in the DS2154 the MSB will be set to a 1 and in the DS2152 it will be set to a 0. The lower 4 bits of  
the IDR are used to display the die revision of the chip.  
The Test Registers at addresses 15, 19, and AC hex are used by the factory in testing the DS2154. On  
power-up, the Test Registers should be set to 00 hex in order for the DS2154 to operate properly.  
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