DS2152
RFFR: RECEIVE FDL FIFO REGISTER (Address=05 Hex)
(MSB)
(LSB)
FDL7
FDL6
FDL5
FDL4
FDL3
FDL2
FDL1
FDL0
SYMBOL
POSITION NAME AND DESCRIPTION
FDL7
FDL6
FDL5
FDL4
FDL3
FDL2
FDL1
FDL0
RFFR.7
RFFR.6
RFFR.5
RFFR.4
RFFR.3
RFFR.2
RFFR.1
RFFR.0
FDL Data Bit 7. MSB of a HDLC packet data byte.
FDL Data Bit 6.
FDL Data Bit 5.
FDL Data Bit 4.
FDL Data Bit 3.
FDL Data Bit 2.
FDL Data Bit 1.
FDL Data Bit 0. LSB of a HDLC packet data byte.
TPRM: TRANSMIT PRM REGISTER (Address=06 Hex)
(MSB)
(LSB)
-
-
-
-
-
TEMPTY
TFULL
UDR
SYMBOL
POSITION NAME AND DESCRIPTION
-
TPRM.7
TPRM.6
TPRM.5
TPRM.4
TPRM.3
TPRM.2
Not Assigned. Could be any value when read.
Not Assigned. Could be any value when read.
-
-
Not Assigned. Could be any value when read.
Not Assigned. Could be any value when read.
Not Assigned. Could be any value when read.
-
-
TEMPTY
Transmit FIFO Empty. A real-time bit that is set high when
the FIFO is empty.
TFULL
UDR
TPRM.1
TPRM.0
Transmit FIFO Full. A real-time bit that is set high when the
FIFO is full.
Underrun. Set when the transmit FIFO unwantedly empties out
and an abort is automatically sent.
NOTE:
The UDR bit is latched and will be cleared when read.
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