DS18B20X
ABSOLUTE MAXIMUM RATINGS*
Voltage on any pin relative to ground
Operating temperature
–0.5V to +6.0V
–55°C to +125°C
Storage temperature
–55°C to +125°C
Soldering temperature
See J-STD-020A Specification
*These are stress ratings only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(-55°C to +125°C; VDD=3.0V to 5.5V)
PARAMETER
Supply Voltage
Pullup Supply
Voltage
SYMBOL CONDITION MIN TYP
MAX
+5.5
+5.5
VDD
±2
UNITS NOTES
VDD
VPU
Local Power
Parasite Power +3.0
Local Power
0°C to +70°C
+3.0
V
V
1
1,2
+3.0
Thermometer Error
tERR
°C
3
-55°C to
+125°C
±3
Input Logic Low
Input Logic High
VIL
VIH
-0.3
+2.2
+0.8
The lower of
V
V
1,4,5
1, 6
Local Power
5.5
or
DD + 0.3
Parasite Power +3.0
V
Sink Current
Standby Current
Active Current
DQ Input Current
Drift
IL
VI/O=0.4V
VDD=5V
4.0
mA
nA
mA
µA
°C
1
7,8
9
10
11
IDDS
IDD
IDQ
750
1
5
1000
1.5
±0.2
NOTES:
1. All voltages are referenced to ground.
2. The Pullup Supply Voltage specification assumes that the pullup device is ideal, and therefore the
high level of the pullup is equal to VPU. In order to meet the VIH spec of the DS18B20X, the actual
supply rail for the strong pullup transistor must include margin for the voltage drop across the
transistor when it is turned on; thus: VPU_ACTUAL = VPU_IDEAL + VTRANSISTOR
.
3. See typical performance curve in Figure 17
4. Logic low voltages are specified at a sink current of 4 mA.
5. To guarantee a presence pulse under low voltage parasite power conditions, VILMAX may have to be
reduced to as low as 0.5V.
6. Logic high voltages are specified at a source current of 1 mA.
7. Standby current specified up to 70°C. Standby current typically is 3 µA at 125°C.
8. To minimize IDDS, DQ should be within the following ranges: GND ≤ DQ ≤ GND + 0.3V or VDD
0.3V ≤ DQ ≤ VDD.
–
9. Active current refers to supply current during active temperature conversions or EEPROM writes.
10. DQ line is high (“hi-Z” state).
11. Drift data is based on a 1000 hour stress test at 125°C with VDD = 5.5V.
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DALLAS [ DALLAS SEMICONDUCTOR ]
