15
8Bit Single Chip Microcontroller
DMC73C168
RESET
VALUE
REGISTER ADDRESS
NAME
NOTE
1
FUNCTION
PLL control register 1
P17
P18
P19
P22
P23
P24
P25
P27
P28
P29
P30
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
P42
P43
P44
P45
P46
P47
P50
P64
:
>0111
>0112
>0113
>0116
>0117
>0118
>0119
>011B
>011C
>011D
>011E
>0120
>0121
>0122
>0123
>0124
>0125
>0126
>0127
>0128
>0129
>012A
>012B
>012C
>012D
>012E
>012F
>0132
>0140
:
PLLCTL1
PLLDATAH
PLLDATAL
IFCCTL
IFCLSD
IFCMSD
IFCHSD
SIO1CTL
SIO1BUF
SIO2CTL
SIO2BUF
ADATA
ADDR
0xxx0000
PLL program counter MSB data register 00000000
PLL program counter LSB data register 00000000
1
1
1
1
IF counter data register
IF counter data register (LSB)
IF counter data register
IF counter data register (MSB)
SIO 1 control register
SIO 1 data register
SIO 2 control register
SIO 2 data register
Port A data value
00000000
00000000
00000000
xxxxxxx0
0000000x
xxxxxxxx
0000000x
xxxxxxxx
xxxxxxxx
00000000
xxxxxxxx
00000000
xxxxxxxx
00000000
xxxxxxxx
00000000
xxxxxxxx
00000000
xxxxxxxx
00000000
xxxxxxxx
00000000
xxxxxxxx
00000000
00000000
xxxxxxxx
Port A direction register
Port B data value
Port B direction
BDATA
BDDR
CDATA
CDDR
DDATA
DDDR
Port C data value
Port C direction register
Port D data value
Port D direction register
Port E data value
Port E direction register
Port F data value
EDATA
EDDR
FDATA
FDDR
GDATA
GDDR
HDATA
HDDR
Port F direction register
Port G data value
Port G direction register
Port H data value
Port H direction register
BEEP control register
Peripheral RAM
BEEP
128 bytes
:
:
P191
>01BF
xxxxxxxx
Notes 1 : Be careful when using logical instructions (e.g., ANDP, ORP, XORP) on these registers
because of different read/write functions.
‘ ’
2 : x means indeterminate
3 : P3, P12, P20, P21, P26,P31, P48, P49, P51-63 are not implemented.
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