DMM Analog front end/Insulation
The ID byte of ES51998 is header of “110010” followed by a buzzer on/off control bit and
R/W bit. The start/stop bit definition is shown on the diagram below.
ES51998(60000counts)
1.2 Read/Write command description
The write command includes one ID byte with four command bytes. If the valid write ID
code is received by ES51998 at any time, the write command operation will be enabled.
The next table shows the content of write command.
Byte
Bit7
Bit6
Bit5
Bit4
Bit3
ID
W1
W2
W3
W4
1
SHBP
B0
AC
PEAK
1
F3
B1
0
PCAL
0
F2
B2
0
IRQ
0
F1
0
EXT
IRV
1
F0
0
0
IRR
0
Q2
FQ2
LPF1
OP0
Bit2
BUZ
Q1
FQ1
LPF0
OP1
Bit1
R/W=0
Q0
FQ0
RP
EXT_ADP
Bit0
Auxiliary low-resistance detection control bit for Continuity and Diode modes:
SHBP
Measurement function control bit:
F3/F2/F1/F0
Range control bit for V/A/R/C modes:
Q2/Q1/Q0
Range control bit for Freq mode:
FQ2/FQ1/FQ0
Buzzer frequency selection:
B2/B1/B0
Buzzer driver ON/OFF control bit:
BUZ
AC mode control enable bit:
AC
PEAK/Calibration mode enable bit:
PEAK/PCAL
3dB BW for low-pass-filter selection:
LPF1/LPF0
External source for Diode mode control bit:
EXT
OP configuration control bit:
OP1/OP0
Frequency mode input resistance control bit or conductance mode control bit:
RP
ADP mode control bit:
EXT_ADP
Insulation mode control bit:
IRQ/IRV/IRR
ver. 1.7
9
12/01/12
CYRUSTEK [ Cyrustek corporation ]
