ES51998(60000counts)
DMM Analog front end/Insulation
AC electrical characteristics
Parameter
Symbol
Min.
Typ.
Max.
Unit
kHz
SCLK clock frequency
SCLK clock time “L”
SLCK clock time “H”
SDATA output delay time
SDATA output hold time
Start condition setup time
Start condition hold time
Data input setup time
fSCLK
tLOW
tHIGH
tAA
-
4.7
4.0
0.1
100
4.7
4.0
200
0
4.7
-
-
4.7
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
100
-
-
3.5
-
-
-
-
-
us
tDH
ns
us
tSU.STA
tHD.STA
tSU. DAT
tHD.DAT
tSU.STO
tR
tF
tBUF
tSU.EOC
tHD.EOC
ns
us
Data input hold time
Stop condition setup time
SCLK/SDATA rising time
SCLK/SDATA falling time
Bus release time
EOC setup time in read mode
EOC hold time in read mode
-
1.0
0.3
-
ns
ns
-
-
MPU I/O timing diagram
SCLK
SDATA IN
SDATA OUT
ver. 1.7
7
12/01/12
CYRUSTEK [ Cyrustek corporation ]
