ES51998(60000counts)
DMM Analog front end/Insulation
3dB=Full (ADP)
3dB=10k (ADP)
3dB=1k (ADP)
—
10
—
—
—
—
—
—
100
—
—
—
—
—
kHz
kHz
kHz
V
3dB frequency for LPF4 active
f3dB
1
Vt1
Vt2
Vt3
2.15
2.03
1.83
Multi-level low battery detector
Peak-hold mode pulse width
LBAT vs. V-
V
V
—
—
ACIN =40 ~ 400Hz
1000
us
—
—
—
—
STBEEP comparator in Diode mode
STBEEP comparator in Cont. mode
OVX to SGND
OVX to SGND
+9
-7
mV
mV
—
—
—
—
HCF detection voltage
VR2-VR5
1100
—
mV
mVp
Square wave with
Duty cycle 40-60%
Frequency input sensitivity (FREQ)
Frequency input sensitivity (FREQ)
Fin
Fin
500
400
—
Sine wave
mVrms
Reference voltage temperature
coefficient
100KΩ
Between
resister
VRH
—
—
ppm/℃
TCRF
50
0℃<TA<70℃
Capacitance measurement
Accuracy5
—
—
-2.5
-30
2.5
30
%F.S
6nF – 60mF
counts
Note:
1. Full Scale (60000 counts for SADC and 600 counts for FADC)
2. SADC = High resolution ADC (slow speed)
3. FADC = High speed ADC (lower resolution)
4. ES51998 built-in 3rd order low pass filter available for AC mode
5. Gain calibration is necessary for higher accuracy
ver. 1.7
6
12/01/12
CYRUSTEK [ Cyrustek corporation ]
