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PALCE16V8-15JC 参数 Datasheet PDF下载

PALCE16V8-15JC图片预览
型号: PALCE16V8-15JC
PDF下载: 下载PDF文件 查看货源
内容描述: 闪存擦除可再编程的CMOS PAL器件 [Flash-Erasable Reprogrammable CMOS PAL Device]
分类和应用: 闪存可编程逻辑器件输入元件时钟
文件页数/大小: 13 页 / 300 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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USE ULTRA37000™ FOR
ALL NEW DESIGNS
AC Test Loads and Waveforms
ALL INPUT PULSES
3.0V
90%
GND
< 2 ns
10%
90%
10%
< 2 ns
PALCE16V8
5V
S1
R1
OUTPUT
R2
C
L
TEST POINT
Commercial
Specification
t
PD
, t
CO
t
PZX
, t
EA
t
PXZ
, t
ER
Closed
Z
·
H: Open
Z
·
L: Closed
H
·
Z: Open
L
·
Z: Closed
5 pF
S
1
C
L
50 pF
R
1
200Ω
R
2
390Ω
R
1
Military
R
2
750Ω
Measured Output Value
1.5V
1.5V
H
·
Z: V
OH
– 0.5V
L
·
Z: V
OL
+ 0.5V
390Ω
Commercial and Industrial Switching Characteristics
[2]
16V8-5
Parameter
t
PD
t
PZX
t
PXZ
t
EA
t
ER
t
CO
t
S
t
H
t
P
Description
Input to Output
Propagation Delay
[8, 9]
OE to Output Enable
OE to Output Disable
Input to Output
Enable Delay
[7]
Input to Output
Disable Delay
[7, 10]
Clock to Output Delay
[8, 9]
Input or Feedback
Set-up Time
Input Hold Time
External Clock
Period (t
CO
+ t
S
)
Min.
1
1
1
1
1
1
3
0
7
Max.
5
6
5
6
5
4
2
5
0
10
16V8-7
Min.
3
Max.
7.5
6
6
9
9
5
2
7.5
0
14.5
16V8-10
Min.
3
Max.
10
10
10
10
10
7
2
12
0
22
16V8-15
Min.
3
Max.
15
15
15
15
15
10
2
15
0
27
16V8-25
Min.
3
Max.
25
20
20
25
25
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Shaded areas contain preliminary information.
Notes:
8. Min. times are tested initially and after any design or process changes that may affect these parameters.
9. This specification is guaranteed for all device outputs changing state in a given access cycle.
10. This parameter is measured as the time after OE pin or internal disable input disables or enables the output pin. This delay is measured to the point at which a previous HIGH
level has fallen to 0.5 volts below V
OH
min. or a previous LOW level has risen to 0.5 volts above V
OL
max.
11. This specification indicates the guaranteed maximum frequency at which a state machine configuration with external feedback can operate.
12. This specification indicates the guaranteed maximum frequency at which the device can operate in data path mode.
13. This specification indicates the guaranteed maximum frequency at which a state machine configuration with internal only feedback can operate.
14. This parameter is calculated from the clock period at f
MAX
internal (1/f
MAX3
) as measured (see Note 7 above) minus t
S
.
Document #: 38-03025 Rev. *A
Page 5 of 13