USE ULTRA37000
TM
FOR
ALL NEW DESIGNS
Commercial Switching Characteristics PALCE22V10
(continued)
[2, 7]
22V10-5
Parameter
t
S1
t
S2
t
H
t
P
t
WH
t
WL
f
MAX1
f
MAX2
f
MAX3
t
CF
t
AW
t
AR
t
AP
t
SPR
t
PR
Description
Input or Feedback Set-Up Time
Synchronous Preset Set-Up
Time
Input Hold Time
External Clock Period (t
CO
+ t
S
)
Clock Width HIGH
[6]
Clock Width LOW
[6]
External Maximum
Frequency (1/(t
CO
+ t
S
))
[11]
Data Path Maximum Frequency
(1/(t
WH
+ t
WL
))
[6, 12]
Internal Feedback Maximum
Frequency (1/(t
CF
+ t
S
))
[6,13]
Register Clock to
Feedback Input
[6,14]
Asynchronous Reset Width
Asynchronous Reset
Recovery Time
Asynchronous Reset to
Registered Output Delay
Synchronous Preset
Recovery Time
Power-up Reset Time
[6,15]
4
1
8
4
7.5
6
1
Min.
3
4
0
7
2.5
2.5
143
200
181
2.5
8
5
12
8
1
[2, 7]
PALCE22V10
22V10-10
Min.
6
7
0
12
3
3
76.9
142
111
2.5
10
6
13
10
1
3
15
10
20
15
1
Max.
22V10-15
Min.
10
10
0
20
6
6
55.5
83.3
68.9
4.5
25
25
25
Max.
22V10-25
Min.
15
15
0
30
13
13
33.3
35.7
38.5
13
Max.
Unit
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
µs
22V10-7
Min.
5
6
0
10
3
3
100
166
133
Max.
Max.
Military and Industrial Switching Characteristics PALCE22V10
22V10-10
Parameter
t
PD
t
EA
t
ER
t
CO
t
S1
t
S2
t
H
t
P
t
WH
t
WL
f
MAX1
f
MAX2
Description
Input to Output
Propagation Delay
[8]
Input to Output Enable Delay
[9]
Input to Output Disable
Delay
[10]
2
6
7
0
12
3
3
76.9
142
Clock to Output Delay
[8]
Input or Feedback Set-up Time
Synchronous Preset Set-up Time
Input Hold Time
External Clock Period (t
CO
+ t
S
)
Clock Width
HIGH
[6]
[6]
22V10-15
Min.
3
Max.
15
15
15
2
10
10
0
20
6
6
50.0
83.3
8
22V10-25
Min.
3
Max.
25
25
25
2
18
18
0
33
14
14
30.3
35.7
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
Min.
3
Max.
10
10
10
7
Clock Width LOW
External Maximum Frequency
(1/(t
CO
+ t
S
))
[11]
Data Path Maximum Frequency
(1/(t
WH
+ t
WL
))
[6, 12 ]
Notes:
11. This specification indicates the guaranteed maximum frequency at which a state machine configuration with external feedback can operate.
12. This specification indicates the guaranteed maximum frequency at which the device can operate in data path mode.
13. This specification indicates the guaranteed maximum frequency at which a state machine configuration with internal only feedback can operate.
14. This parameter is calculated from the clock period at f
MAX
internal (1/f
MAX3
) as measured (see Note above) minus t
S
.
15. The registers in the PALCE22V10 have been designed with the capability to reset during system power-up. Following power-up, all registers will be reset to a
logic LOW state. The output state will depend on the polarity of the output buffer. This feature is useful in establishing state machine initialization. To insure proper
operation, the rise in V
CC
must be monotonic and the timing constraints depicted in Power-Up Reset Waveform must be satisfied.
Document #: 38-03027 Rev. *B
Page 6 of 13
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