CY8C24x23A Final Data Sheet
PSoC™ Overview
Analog blocks are arranged in a column of three, which
includes one CT (Continuous Time) and two SC (Switched
Capacitor) blocks, as shown in the figure below.
Additional System Resources
System Resources, some of which have been previously listed,
provide additional capability useful to complete systems. Addi-
tional resources include a multiplier, decimator, switch mode
pump, low voltage detection, and power on reset. Brief state-
ments describing the merits of each system resource are pre-
sented below.
P0[7]
P0[5]
P0[6]
P0[4]
■ Digital clock dividers provide three customizable clock fre-
quencies for use in applications. The clocks can be routed to
both the digital and analog systems. Additional clocks can be
generated using digital PSoC blocks as clock dividers.
P0[3]
P0[1]
P0[2]
P0[0]
P2[6]
P2[4]
■ A multiply accumulate (MAC) provides a fast 8-bit multiplier
with 32-bit accumulate, to assist in both general math as well
as digital filters.
P2[3]
P2[1]
■ The decimator provides a custom hardware filter for digital
signal processing applications including the creation of Delta
Sigma ADCs.
P2[2]
P2[0]
■ The I2C module provides 100 and 400 kHz communication
over two wires. Slave, master, and multi-master modes are
all supported.
■ Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
Array Input Configuration
ACI0[1:0]
ACI1[1:0]
■ An internal 1.3V reference provides an absolute reference for
the analog system, including ADCs and DACs.
■ An integrated switch mode pump (SMP) generates normal
operating voltages from a single 1.2V battery cell, providing a
low cost boost converter.
Block Array
ACB00
ASC10
ASD20
ACB01
PSoC Device Characteristics
ASD11
ASC21
Depending on your PSoC device characteristics, the digital and
analog systems can have 16, 8, or 4 digital blocks and 12, 6, or
3 analog blocks. The following table lists the resources
available for specific PSoC device groups. The PSoC device
covered by this data sheet is shown in the next to the last row of
the table.
Analog Reference
Interface to
Digital System
Reference
Generators
RefHi
RefLo
AGND
AGNDIn
RefIn
Bandgap
PSoC Device Characteristics
PSoC Device
Group
M8C Interface (Address Bus, Data Bus, Etc.)
Analog System Block Diagram
CY8C29x66
CY8C27x43
CY8C24x23
CY8C24x23A
CY8C22x13
64
44
24
24
16
4
2
1
1
1
16
8
12
12
12
12
8
4
4
2
2
1
4
4
2
2
1
12
12
6
2 KB
32 KB
16 KB
4 KB
256 Bytes
256 Bytes
256 Bytes
256 Bytes
4
4
6
4 KB
2 KB
4
3
4a
4a
CY8C21x34
CY8C21x23
28
16
1
1
4
4
28
8
0
0
2
2
512 Bytes
256 Bytes
8 KB
4 KB
a. Limited analog functionality.
September 8, 2004
Document No. 38-12028 Rev. *B
3
CYPRESS [ CYPRESS ]
