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CY7C68300C-56PVXC 参数 Datasheet PDF下载

CY7C68300C-56PVXC图片预览
型号: CY7C68300C-56PVXC
PDF下载: 下载PDF文件 查看货源
内容描述: EZ- USB AT2LP ™ USB 2.0到ATA / ATAPI桥 [EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI Bridge]
分类和应用: 总线控制器微控制器和处理器外围集成电路光电二极管数据传输时钟
文件页数/大小: 41 页 / 797 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C68300C, CY7C68301C
CY7C68320C, CY7C68321C
Introduction
The EZ-USB AT2LP™ (CY7C68300C/CY7C68301C and
CY7C68320C/CY7C68321C) implements a fixed-function
bridge between one USB port and one or two ATA- or
ATAPI-based mass storage device ports. This bridge adheres to
the Mass Storage Class Bulk-Only Transport Specification (BOT)
and is intended for bus and self powered devices.
The AT2LP is the latest addition to the Cypress USB mass
storage portfolio, and is an ideal cost- and power-reduction path
for designs that previously used Cypress’s ISD-300A1,
ISD-300LP, or EZ-USB AT2.
Specifically, the CY7C68300C/CY7C68301C includes a mode
that makes it pin-for-pin compatible with the EZ-USB AT2
(CY7C68300A).
The
USB
port
of
the
CY7C68300C/301C
and
CY7C68320C/321A (AT2LP) are connected to a host computer
directly or with the downstream port of a USB hub. Software on
the USB host system issues commands and sends data to the
AT2LP and receives status and data from the AT2LP using
standard USB protocol.
The ATA/ATAPI port of the AT2LP is connected to one or two
mass storage devices. A 4 KB buffer maximizes ATA/ATAPI data
transfer rates by minimizing losses due to device seek times. The
ATA interface supports ATA PIO modes 0, 3, and 4, multiword
DMA mode 2, and Ultra DMA modes 2, 3, and 4.
The device initialization process is configurable, enabling the
AT2LP to initialize ATA/ATAPI devices without software inter-
vention.
signature is 0x534B, the AT2LP configures itself with the AT2LP
pinout and begins normal mass storage operation.
Refer to the logic flow in
for more information on the
pinout selection process.
Most designs that use the AT2 can migrate to the AT2LP with no
changes to either the board layout or EEPROM data. Cypress
has published an application note focused on migrating from the
AT2 to the AT2LP to help expedite the process. It can be
downloaded from the Cypress website (http://www.cypress.com)
or obtained through a Cypress representative.
Figure 1. Simplified Pinout Selection Flowchart
Read EEPROM
EEPROM
Signature
0x4D4D?
No
Yes
Set
EZ-USB AT2
(CY7C68300A)
Pinout
Set
EZ-USB AT2LP
(CY7C68300B)
Pinout
CY7C68300A Compatibility
As mentioned in the previous section, the CY7C68300C/301C
contains a backward compatibility mode that enables it to be
used in existing EZ-USB AT2 (CY7C68300A) designs. The
backward compatibility mode is enabled by programming the
EEPROM with the CY7C68300A signature.
During startup, the AT2LP checks the I
2
C™ bus for an EEPROM
with a valid signature in the first two bytes. If the signature is
0x4D4D, the AT2LP configures itself for pin-to-pin compatibility
with the AT2 and begins normal mass storage operation. If the
Normal Operation
Document 001-05809 Rev. *C
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