CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
Table 5-1. FX2LP Register Summary (continued)
Hex Size Name
Description
b7
b6
b5
b4
b3
b2
b1
b0
Default
Access
E62E 1
E62F 1
ECC2B1
ECC2 Byte 1 Address
ECC2 Byte 2 Address
LINE7
COL5
LINE6
COL4
PKTSTAT
LINE5
COL3
LINE4
COL2
LINE3
COL1
LINE2
COL0
0
LINE1
0
LINE0
0
00000000 R
ECC2B2
00000000 R
[11]
[11]
E630
H.S.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
EP2FIFOPFH
Endpoint 2 / slave FIFO DECIS
Programmable Flag H
IN:PKTS[2] IN:PKTS[1] IN:PKTS[0]
OUT:PFC12 OUT:PFC11 OUT:PFC10
PFC9
PFC8
10001000 bbbbbrbb
E630
F.S.
EP2FIFOPFH
Endpoint 2 / slave FIFO DECIS
Programmable Flag H
PKTSTAT
PFC6
OUT:PFC12 OUT:PFC11 OUT:PFC10 0
PFC9
PFC1
PFC1
0
IN:PKTS[2] 10001000 bbbbbrbb
OUT:PFC8
[11]
[11]
[11]
E631
H.S.
EP2FIFOPFL
Endpoint 2 / slave FIFO PFC7
Programmable Flag L
PFC5
PFC4
PFC4
PFC3
PFC3
PFC2
PFC2
PFC0
PFC0
PFC8
PFC8
PFC0
PFC0
PFC8
00000000 RW
E631
F.S
EP2FIFOPFL
Endpoint 2 / slave FIFO IN:PKTS[1] IN:PKTS[0] PFC5
Programmable Flag L OUT:PFC7 OUT:PFC6
00000000 RW
E632
H.S.
EP4FIFOPFH
Endpoint 4 / slave FIFO DECIS
Programmable Flag H
PKTSTAT
PKTSTAT
PFC6
0
IN: PKTS[1] IN: PKTS[0] 0
OUT:PFC10 OUT:PFC9
10001000 bbrbbrrb
10001000 bbrbbrrb
00000000 RW
[11]
E632
F.S
EP4FIFOPFH
Endpoint 4 / slave FIFO DECIS
Programmable Flag H
0
OUT:PFC10 OUT:PFC9
0
0
[11]
[11]
[11]
E633
H.S.
EP4FIFOPFL
Endpoint 4 / slave FIFO PFC7
Programmable Flag L
PFC5
PFC4
PFC4
PFC3
PFC3
PFC2
PFC2
0
PFC1
PFC1
PFC9
PFC9
PFC1
PFC1
0
E633
F.S
EP4FIFOPFL
Endpoint 4 / slave FIFO IN: PKTS[1] IN: PKTS[0] PFC5
Programmable Flag L OUT:PFC7 OUT:PFC6
00000000 RW
E634
H.S.
EP6FIFOPFH
Endpoint 6 / slave FIFO DECIS
Programmable Flag H
PKTSTAT
PKTSTAT
PFC6
IN:PKTS[2] IN:PKTS[1] IN:PKTS[0]
OUT:PFC12 OUT:PFC11 OUT:PFC10
00001000 bbbbbrbb
[11]
E634
F.S
EP6FIFOPFH
Endpoint 6 / slave FIFO DECIS
Programmable Flag H
OUT:PFC12 OUT:PFC11 OUT:PFC10 0
IN:PKTS[2] 00001000 bbbbbrbb
OUT:PFC8
[11]
[11]
[11]
E635
H.S.
EP6FIFOPFL
Endpoint 6 / slave FIFO PFC7
Programmable Flag L
PFC5
PFC4
PFC4
PFC3
PFC3
PFC2
PFC2
PFC0
PFC0
PFC8
PFC8
PFC0
PFC0
00000000 RW
E635
F.S
EP6FIFOPFL
Endpoint 6 / slave FIFO IN:PKTS[1] IN:PKTS[0] PFC5
Programmable Flag L OUT:PFC7 OUT:PFC6
00000000 RW
E636
H.S.
EP8FIFOPFH
Endpoint 8 / slave FIFO DECIS
Programmable Flag H
PKTSTAT
PKTSTAT
PFC6
0
IN: PKTS[1] IN: PKTS[0] 0
OUT:PFC10 OUT:PFC9
00001000 bbrbbrrb
00001000 bbrbbrrb
00000000 RW
[11]
E636
F.S
EP8FIFOPFH
Endpoint 8 / slave FIFO DECIS
Programmable Flag H
0
OUT:PFC10 OUT:PFC9
0
0
[11]
E637
H.S.
EP8FIFOPFL
EP8FIFOPFL
reserved
Endpoint 8 / slave FIFO PFC7
Programmable Flag L
PFC5
PFC4
PFC4
PFC3
PFC3
PFC2
PFC2
PFC1
PFC1
[11]
E637
F.S
Endpoint 8 / slave FIFO IN: PKTS[1] IN: PKTS[0] PFC5
Programmable Flag L OUT:PFC7 OUT:PFC6
00000000 RW
8
1
E640
E641
E642
E643
EP2ISOINPKTS
EP4ISOINPKTS
EP6ISOINPKTS
EP8ISOINPKTS
reserved
EP2 (if ISO) IN Packets AADJ
per frame (1-3)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
INPPF1
INPPF1
INPPF1
INPPF1
INPPF0
INPPF0
INPPF0
INPPF0
00000001 brrrrrbb
00000001 brrrrrrr
00000001 brrrrrbb
00000001 brrrrrrr
1
1
1
EP4 (if ISO) IN Packets AADJ
per frame (1-3)
EP6 (if ISO) IN Packets AADJ
per frame (1-3)
EP8 (if ISO) IN Packets AADJ
per frame (1-3)
E644
E648
E649
4
1
7
[11]
INPKTEND
Force IN Packet End
Skip
0
0
0
0
0
0
EP3
EP3
EP2
EP2
EP1
EP1
EP0
EP0
xxxxxxxx
xxxxxxxx
W
W
[11]
OUTPKTEND
Force OUT Packet End Skip
INTERRUPTS
[11]
E650
E651
E652
E653
E654
E655
E656
E657
E658
E659
1
1
1
1
1
1
1
1
1
1
EP2FIFOIE
Endpoint 2 slave FIFO
Flag Interrupt Enable
0
0
0
0
0
0
0
0
0
0
0
0
0
EDGEPF
PF
EF
EF
EF
EF
EF
EF
EF
EF
EP1
EP1
0
FF
00000000 RW
[11,12]
EP2FIFOIRQ
Endpoint 2 slave FIFO
Flag Interrupt Request
0
0
0
0
PF
FF
00000000 rrrrrbbb
00000000 RW
[11]
EP4FIFOIE
Endpoint 4 slave FIFO
Flag Interrupt Enable
0
0
0
EDGEPF
0
PF
FF
[11,12]
[11,12]
[11,12]
EP4FIFOIRQ
Endpoint 4 slave FIFO
Flag Interrupt Request
0
0
0
PF
FF
00000000 rrrrrbbb
00000000 RW
[11]
EP6FIFOIE
Endpoint 6 slave FIFO
Flag Interrupt Enable
0
0
0
EDGEPF
0
PF
FF
EP6FIFOIRQ
Endpoint 6 slave FIFO
Flag Interrupt Request
0
0
0
PF
FF
00000000 rrrrrbbb
00000000 RW
[11]
EP8FIFOIE
EP8FIFOIRQ
IBNIE
Endpoint 8 slave FIFO
Flag Interrupt Enable
0
0
0
EDGEPF
0
PF
FF
Endpoint 8 slave FIFO
Flag Interrupt Request
0
0
0
PF
FF
00000000 rrrrrbbb
00000000 RW
IN-BULK-NAK Interrupt
Enable
0
EP8
EP8
EP4
EP4
EP6
EP6
EP2
EP2
EP4
EP2
EP2
EP0
EP0
EP0
EP0
IBN
IBN
[12]
IBNIRQ
IN-BULK-NAK interrupt
Request
0
EP4
00xxxxxx rrbbbbbb
00000000 RW
E65A 1
E65B 1
NAKIE
Endpoint Ping-NAK / IBN EP8
Interrupt Enable
EP6
EP6
EP1
[12]
NAKIRQ
Endpoint Ping-NAK / IBN EP8
Interrupt Request
EP1
0
xxxxxx0x bbbbbbrb
E65C 1
E65D 1
E65E 1
USBIE
USB Int Enables
0
EP0ACK
EP0ACK
EP6
HSGRANT URES
HSGRANT URES
SUSP
SUTOK
SUTOK
EP1IN
SOF
SUDAV
SUDAV
EP0IN
00000000 RW
[12]
USBIRQ
USB Interrupt Requests
0
SUSP
SOF
0xxxxxxx rbbbbbbb
00000000 RW
EPIE
Endpoint Interrupt
Enables
EP8
EP4
EP2
EP1OUT
EP0OUT
[12]
E65F 1
EPIRQ
Endpoint Interrupt
Requests
EP8
EP6
EP4
EP2
EP1OUT
EP1IN
EP0OUT
EP0IN
0
RW
[11]
E660
E661
1
1
GPIFIE
GPIF Interrupt Enable
GPIF Interrupt Request
0
0
0
0
0
0
0
0
0
0
0
0
GPIFWF
GPIFWF
GPIFDONE 00000000 RW
GPIFDONE 000000xx RW
[11]
GPIFIRQ
Note:
12. The register can only be reset, it cannot be set.
Document #: 38-08032 Rev. *K
Page 30 of 60
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