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CY7C68013A-128AXI 参数 Datasheet PDF下载

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型号: CY7C68013A-128AXI
PDF下载: 下载PDF文件 查看货源
内容描述: EZ- USB FX2LP ™ USB微控制器 [EZ-USB FX2LP⑩ USB Microcontroller]
分类和应用: 微控制器
文件页数/大小: 60 页 / 3344 K
品牌: CYPRESS [ CYPRESS ]
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CY7C68013A/CY7C68014A  
CY7C68015A/CY7C68016A  
2
3.15  
ECC Generation[7]  
3.18  
I C Controller  
The EZ-USB can calculate ECCs (Error-Correcting Codes) on  
data that passes across its GPIF or Slave FIFO interfaces.  
There are two ECC configurations: Two ECCs, each calcu-  
lated over 256 bytes (SmartMedia Standard); and one ECC  
calculated over 512 bytes.  
FX2LP has one I2C port that is driven by two internal  
controllers, one that automatically operates at boot time to  
load VID/PID/DID and configuration information, and another  
that the 8051, once running, uses to control external I2C  
devices. The I2C port operates in master mode only.  
The ECC can correct any one-bit error or detect any two-bit  
error.  
3.18.1 I2C Port Pins  
The I2C pins SCL and SDA must have external 2.2-kpull-up  
resistors even if no EEPROM is connected to the FX2LP.  
External EEPROM device address pins must be configured  
properly. See Table 3-8 for configuring the device address  
pins.  
3.15.1 ECC Implementation  
The two ECC configurations are selected by the ECCM bit:  
3.15.1.1 ECCM = 0  
Two 3-byte ECCs, each calculated over a 256-byte block of  
data. This configuration conforms to the SmartMedia  
Standard.  
Table 3-8. Strap Boot EEPROM Address Lines to These  
Values  
Bytes  
16  
Example EEPROM  
24LC00[9]  
24LC01  
A2  
N/A  
0
A1  
N/A  
0
A0  
N/A  
0
Write any value to ECCRESET, then pass data across the  
GPIF or Slave FIFO interface. The ECC for the first 256 bytes  
of data will be calculated and stored in ECC1. The ECC for the  
next 256 bytes will be stored in ECC2. After the second ECC  
is calculated, the values in the ECCx registers will not change  
until ECCRESET is written again, even if more data is subse-  
quently passed across the interface.  
128  
256  
4K  
24LC02  
0
0
0
24LC32  
0
0
1
8K  
24LC64  
0
0
1
16K  
24LC128  
0
0
1
3.15.1.2 ECCM = 1  
One 3-byte ECC calculated over a 512-byte block of data.  
3.18.2 I2C Interface Boot Load Access  
Write any value to ECCRESET then pass data across the  
GPIF or Slave FIFO interface. The ECC for the first 512 bytes  
of data will be calculated and stored in ECC1; ECC2 is unused.  
After the ECC is calculated, the value in ECC1 will not change  
until ECCRESET is written again, even if more data is subse-  
quently passed across the interface  
At power-on reset the I2C interface boot loader will load the  
VID/PID/DID configuration bytes and up to 16 KBytes of  
program/data. The available RAM spaces are 16 KBytes from  
0x0000–0x3FFF and 512 bytes from 0xE000–0xE1FF. The  
8051 will be in reset. I2C interface boot loads only occur after  
power-on reset.  
3.16  
USB Uploads and Downloads  
3.18.3 I2C Interface General-Purpose Access  
The core has the ability to directly edit the data contents of the  
internal 16-KByte RAM and of the internal 512-byte scratch  
pad RAM via a vendor-specific command. This capability is  
normally used when “soft” downloading user code and is  
available only to and from internal RAM, only when the 8051  
is held in reset. The available RAM spaces are 16 KBytes from  
0x0000–0x3FFF (code/data) and 512 bytes from  
0xE000–0xE1FF (scratch pad data RAM).[8]  
The 8051 can control peripherals connected to the I2C bus  
using the I2CTL and I2DAT registers. FX2LP provides I2C  
master control only, it is never an I2C slave.  
3.19  
Compatible with Previous Generation  
EZ-USB FX2  
The EZ-USB FX2LP is form/fit and with minor exceptions  
functionally compatible with its predecessor, the EZ-USB FX2.  
This makes for an easy transition for designers wanting to  
upgrade their systems from the FX2 to the FX2LP. The pinout  
and package selection are identical, and the vast majority of  
firmware previously developed for the FX2 will function in the  
FX2LP.  
3.17  
Autopointer Access  
FX2LP provides two identical autopointers. They are similar to  
the internal 8051 data pointers, but with an additional feature:  
they can optionally increment after every memory access. This  
capability is available to and from both internal and external  
RAM. The autopointers are available in external FX2LP  
registers, under control of a mode bit (AUTOPTRSET-UP.0).  
Using the external FX2LP autopointer access (at 0xE67B –  
0xE67C) allows the autopointer to access all RAM, internal  
and external to the part. Also, the autopointers can point to any  
FX2LP register or endpoint buffer space. When autopointer  
access to external memory is enabled, location 0xE67B and  
0xE67C in XDATA and code space cannot be used.  
For designers migrating from the FX2 to the FX2LP a change  
in the bill of material and review of the memory allocation (due  
to increased internal memory) is required for more information  
about migrating from EZ-USB FX2 to EZ-USB FX2LP, please  
see further details in the application note titled Migrating from  
EZ-USB FX2 to EZ-USB FX2LP, which is available on the  
Cypress Website.  
Notes:  
7. To use the ECC logic, the GPIF or Slave FIFO interface must be configured for byte-wide operation.  
8. After the data has been downloaded from the host, a “loader” can execute from internal RAM in order to transfer downloaded data to external memory.  
9. This EEPROM does not have address pins.  
Document #: 38-08032 Rev. *K  
Page 12 of 60  
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