CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
Package Diagrams (continued)
51-85101-*B
Figure 11-4. 128-Lead Thin Plastic Quad Flatpack (14 x 20 x 1.4 mm) A128
PCB Layout Recommendations[24]
• It is preferred is to have no vias placed on the DPLUS or
DMINUS trace routing.
12.0
The following recommendations should be followed to ensure
reliable high-performance operation.
• Isolate the DPLUS and DMINUS traces from all other signal
traces by no less than 10 mm.
• At least a four-layer impedance controlled boards are re-
quired to maintain signal quality.
13.0
Quad Flat Package No Leads (QFN)
• Specify impedance targets (ask your board vendor what
they can achieve).
Package Design Notes
Electrical contact of the part to the Printed Circuit Board (PCB)
is made by soldering the leads on the bottom surface of the
package to the PCB. Hence, special attention is required to the
heat transfer area below the package to provide a good
thermal bond to the circuit board. A Copper (Cu) fill is to be
designed into the PCB as a thermal pad under the package.
Heat is transferred from the FX2LP through the device’s metal
paddle on the bottom side of the package. Heat from here, is
conducted to the PCB at the thermal pad. It is then conducted
from the thermal pad to the PCB inner ground plane by a 5 x 5
array of via. A via is a plated through hole in the PCB with a
finished diameter of 13 mil. The QFN’s metal die paddle must
be soldered to the PCB’s thermal pad. Solder mask is placed
on the board top side over each via to resist solder flow into
the via. The mask on the top side also minimizes outgassing
during the solder reflow process.
• To controlimpedance, maintain trace widths and trace spac-
ing.
• Minimize stubs to minimize reflected signals.
• Connections between the USB connector shell and signal
ground must be done near the USB connector.
• Bypass/flyback caps on VBus, near connector, are recom-
mended.
• DPLUS and DMINUS trace lengths should be kept to within
2 mm of each other in length, with preferred length of 20-
30 mm.
• Maintain a solid ground plane under the DPLUS and DMI-
NUS traces. Do not allow the plane to be split under these
traces.
Note:
24. Source for recommendations: EZ-USB FX2™PCB Design Recommendations, http://www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf and High
Speed USB Platform Design Guidelines, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.
Document #: 38-08032 Rev. *G
Page 53 of 55
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