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CY7C185-35SC 参数 Datasheet PDF下载

CY7C185-35SC图片预览
型号: CY7C185-35SC
PDF下载: 下载PDF文件 查看货源
内容描述: 8K ×8静态RAM [8K x 8 Static RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管输出元件输入元件PC
文件页数/大小: 12 页 / 306 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C185
Switching Waveforms
(continued)
Write Cycle No. 1 (WE Controlled)
[9,11]
t
WC
ADDRESS
CE
1
t
AW
CE
2
CE
WE
t
SA
t
SCE2
t
PWE
t
SCEI
t
HA
OE
t
SD
DATA I/O
NOTE 12
t
HZOE
DATA
IN
VALID
t
HD
Write Cycle No. 2 (CE Controlled)
[11,12,13]
t
WC
ADDRESS
CE
1
t
SA
CE
2
t
AW
WE
t
SD
DATA I/O
DATA
IN
VALID
t
HD
t
SCE2
t
HA
t
SCE1
Notes:
12. During this period, the I/Os are in the output state and input signals should not be applied.
13. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of t
HZWE
and t
SD
.
Document #: 38-05043 Rev. *B
Page 5 of 12