CY7C1329
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
..................................... −65°C
to +150°C
Ambient Temperature with
Power Applied..................................................
−55°C
to +125°C
Supply Voltage on V
DD
Relative to GND.........−0.5V to +4.6V
DC Voltage Applied to Outputs
in High-Z State
[7]
.....................................−0.5V
to V
DDQ
+ 0.5V
DC Input Voltage
[7]
..................................−0.5V
to V
DDQ
+ 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... >200 mA
Operating Range
Range
Commercial
Industrial
Ambient Temperature
[8]
0°C to +70°C
-40°C to +85°C
V
DD
V
DDQ
3.3V
3.3V
−5%/+10% −5%/+10%
Electrical Characteristics
Over the Operating Range
Parameter
V
DD
V
DDQ
V
OH
V
OL
V
IH
V
IL
I
X
Description
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
[7]
Input Load Current
Except ZZ and MODE
GND
≤
V
I
≤
V
DDQ
3.3V
−5%/+10%
3.3V
−5%/+10%
V
DD
= Min., I
OH
=
−4.0
mA
V
DD
= Min., I
OL
= 8.0 mA
2.0
–0.3
−5
–30
5
–5
30
−5
7.5-ns cycle, 133 MHz
10-ns cycle, 100 MHz
7.5-ns cycle, 133 MHz
10-ns cycle, 100 MHz
All speeds
5
325
260
60
50
5
Test Conditions
Min.
3.135
3.135
2.4
0.4
V
DDQ
+
0.3V
0.8
5
Max.
3.6
3.6
Unit
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
mA
mA
mA
mA
mA
Input Current of MODE Input = V
SS
Input = V
DDQ
Input Current of ZZ
I
OZ
I
DD
I
SB1
Output Leakage
Current
V
DD
Operating Supply
Current
Automatic CS
Power-down
Current—TTL Inputs
Input = V
SS
Input = V
DDQ
GND
≤
V
I
≤
V
DDQ,
Output Disabled
V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
Max. V
DD
, Device Deselected,
V
IN
≥
V
IH
or V
IN
≤
V
IL
f = f
MAX
= 1/t
CYC
I
SB2
Automatic CS
Max. V
DD
, Device Deselected,
Power-down
V
IN
≤
0.3V or V
IN
> V
DDQ
– 0.3V,
Current—CMOS Inputs f = 0
Automatic CS
Max. V
DD
, Device Deselected, or
Power-down
V
IN
≤
0.3V or V
IN
> V
DDQ
– 0.3V
Current—CMOS Inputs f = f
MAX
= 1/t
CYC
Automatic CS
Power-down
Current—TTL Inputs
Max. V
DD
, Device Deselected,
V
IN
≥
V
IH
or V
IN
≤
V
IL
, f = 0
I
SB3
7.5-ns cycle, 133 MHz
10-ns cycle, 100 MHz
40
30
25
mA
mA
mA
I
SB4
Notes:
4. X = “Don't Care,” 1 = Logic HIGH, 0 = Logic LOW.
5. The SRAM always initiates a Read cycle when ADSP asserted, regardless of the state of GW, BWE, or BW
[3:0]
. Writes may occur only on subsequent clocks
after the ADSP or with the assertion of ADSC. As a result, OE must be driven HIGH prior to the start of the Write cycle to allow the outputs to three-state. OE
is a “don't care” for the remainder of the Write cycle.
6. OE is asynchronous and is not sampled with the clock rise. It is masked internally during Write cycles. During a Read cycle DQ = High-Z when OE is inactive
or when the device is deselected, and DQ = data when OE is active.
7. Minimum voltage equals –2.0V for pulse durations of less than 20 ns.
8. T
A
is the case temperature.
Document #: 38-05279 Rev. *B
Page 7 of 15
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