PRELIMINARY
CY7C1061AV25
Switching Waveforms (continued)
(OEControlled)[11, 12]
Read Cycle No. 2
ADDRESS
t
RC
CE
1
CE
2
t
ACE
OE
t
HZOE
t
DOE
BHE, BLE
t
LZOE
t
HZCE
t
DBE
t
LZBE
t
HZBE
HIGH
IMPEDANCE
HIGH IMPEDANCE
DATA OUT
DATA VALID
t
LZCE
t
PD
I
ICC
t
CC
PU
V
CC
50%
50%
SUPPLY
CURRENT
I
SB
[13, 14, 15]
Write Cycle No. 1 (CE Controlled)
t
WC
ADDRESS
t
SA
t
SCE
CE
t
AW
t
HA
t
PWE
WE
t
BW
BHE, BLE
t
t
SD
HD
DATAI/O
Notes:
12. Address valid prior to or coincident with CE1 transition LOW and CE2 transition HIGH.
13. Data I/O is high-impedance if OE or BHE and/or BLE = VIH
.
14. If CE1 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
15. CE is a shorthand combination of both CE1 and CE2 combined. It is active LOW.
Document #: 38-05331 Rev. **
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