CY7C024AV/025AV/026AV
CY7C0241AV/0251AV/036AV
Switching Waveforms
Read Cycle No. 1 (Either Port Address Access)
[28, 29, 30]
t
RC
ADDRESS
t
OHA
DATA OUT
t
AA
DATA VALID
t
OHA
PREVIOUS DATA VALID
Read Cycle No. 2 (Either Port CE/OE Access)
[28, 31, 32]
CE and
LB or UB
OE
t
LZOE
DATA OUT
t
LZCE
t
PU
I
CC
CURRENT
I
SB
t
PD
DATA VALID
t
ACE
t
HZCE
t
DOE
t
HZOE
Read Cycle No. 3 (Either Port)
[28, 30, 31, 32]
t
RC
ADDRESS
t
AA
UB or LB
t
HZCE
t
LZCE
t
ABE
CE
t
ACE
t
LZCE
DATA OUT
t
HZCE
t
OHA
Notes:
28. R/W is HIGH for read cycles.
29. Device is continuously selected CE = V
IL
and UB or LB = V
IL
. This waveform cannot be used for semaphore reads.
30. OE = V
IL
.
31. Address valid prior to or coincident with CE transition LOW.
32. To access RAM, CE = V
IL
, UB or LB = V
IL
, SEM = V
IH
. To access semaphore, CE = V
IH
, SEM = V
IL
.
Document #: 38-06052 Rev. *H
Page 11 of 19
CYPRESS [ CYPRESS SEMICONDUCTOR ]
