CY7C008/009
CY7C018/019
Functional Description
The CY7C008/009 and CY7C018/019 are low-power CMOS
64K, 128K x 8/9 dual-port static RAMs. Various arbitration
schemes are included on the devices to handle situations
when multiple processors access the same piece of data. Two
ports are provided permitting independent, asynchronous
access for reads and writes to any location in memory. The
devices can be utilized as standalone 8/9-bit dual-port static
RAMs or multiple devices can be combined in order to function
as a 16/18-bit or wider master/slave dual-port static RAM. An
M/S pin is provided for implementing 16/18-bit or wider
memory applications without the need for separate master and
slave devices or additional discrete logic. Application areas
include interprocessor/multiprocessor designs, communica-
tions status buffering, and dual-port video/graphics memory.
Each port has independent control pins: chip enable (CE),
read or write enable (R/W), and output enable (OE). Two flags
are provided on each port (BUSY and INT). BUSY signals that
the port is trying to access the same location currently being
accessed by the other port. The interrupt flag (INT) permits
communication between ports or systems by means of a mail
box. The semaphores are used to pass a flag, or token, from
one port to the other to indicate that a shared resource is in
use. The semaphore logic is comprised of eight shared
latches. Only one side can control the latch (semaphore) at
any time. Control of a semaphore indicates that a shared
resource is in use. An automatic power-down feature is
controlled independently on each port by a chip select (CE)
pin.
The CY7C008/009 and CY7C018/019 are available in 100-pin
Thin Quad Plastic Flatpack (TQFP) packages.
Pin Configurations
100-Pin TQFP
(Top View)
BUSYL
BUSYR
GND
INTL
INTR
A0R
A1R
A2R
A3R
A4R
A5R
A6R
M/S
A6L
A5L
A4L
A3L
A2L
A1L
A0L
NC
NC
NC
NC
NC
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
NC
NC
A7L
A8L
A9L
A10L
A11L
A12L
A13L
A14L
A15L
VCC
NC
NC
NC
NC
CE0L
CE1L
SEML
R/WL
OEL
GND
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
NC
NC
A7R
A8R
A9R
A10R
A11R
A12R
A13R
A14R
A15R
A16R [5]
GND
NC
NC
NC
NC
CE0R
CE1R
SEMR
R/WR
OER
GND
GND
NC
CY7C009 (128K x 8)
CY7C008 (64K x 8)
I/O0R
I/01R
GND
GND
GND
I/O2R
I/O3R
I/O4R
I/O5R
I/O6R
I/O7R
NC
VCC
VCC
NC
NC
I/O7L
I/O6L
I/O5L
I/O4L
I/O3L
I/O2L
I/O1L
Note:
5. This pin is NC for CY7C008.
Document #: 38-06041 Rev. *D
I/O0L
NC
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CYPRESS [ CYPRESS SEMICONDUCTOR ]
