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CY7B991V-7JC 参数 Datasheet PDF下载

CY7B991V-7JC图片预览
型号: CY7B991V-7JC
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压可编程偏移时钟缓冲器 [Low Voltage Programmable Skew Clock Buffer]
分类和应用: 时钟驱动器逻辑集成电路
文件页数/大小: 14 页 / 383 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7B991V
3.3V RoboClock
®
Block Diagram Description
Phase Frequency Detector and Filter
The Phase Frequency Detector and Filter blocks accept inputs
from the reference frequency (REF) input and the feedback (FB)
input. They generate correction information to control the
frequency of the Voltage Controlled Oscillator (VCO). These
blocks, along with the VCO, form a Phase Locked Loop (PLL)
that tracks the incoming REF signal.
Skew Select Matrix
The skew select matrix is comprised of four independent
sections. Each section has two low skew, high fanout drivers
(xQ0, xQ1), and two corresponding three level function select
(xF0, xF1) inputs.
shows the nine possible output
functions for each section as determined by the function select
inputs. All times are measured with respect to the REF input
assuming that the output connected to the FB input has 0t
U
selected.
VCO and Time Unit Generator
The VCO accepts analog control inputs from the PLL filter block.
It generates a frequency that is used by the time unit generator
to create discrete time units, selected in the skew select matrix.
The operational range of the VCO is determined by the FS
control pin. The time unit (t
U
) is determined by the operating
frequency of the device and the level of the FS pin as shown in
Table 1. Frequency Range Select and t
U
Calculation
f
NOM
(MHz)
FS
LOW
MID
HIGH
Min
15
25
40
Max
30
50
80
1
t
U
=
-----------------------
-
f
NOM
×
N
Table 2. Programmable Skew Configurations
Function Selects
1F1, 2F1,
3F1, 4F1
LOW
LOW
LOW
MID
MID
MID
HIGH
HIGH
HIGH
1F0, 2F0,
3F0, 4F0
LOW
MID
HIGH
LOW
MID
HIGH
LOW
MID
HIGH
Output Functions
1Q0, 1Q1,
2Q0, 2Q1
–4t
U
–3t
U
–2t
U
–1t
U
0t
U
+1t
U
+2t
U
+3t
U
+4t
U
3Q0, 3Q1
4Q0, 4Q1
Divide by 2 Divide by 2
–6t
U
–4t
U
–2t
U
0t
U
+2t
U
+4t
U
+6t
U
Divide by 4
–6t
U
–4t
U
–2t
U
0t
U
+2t
U
+4t
U
+6t
U
Inverted
where N =
44
26
16
Approximate
Frequency (MHz) At
Which t
U
= 1.0 ns
22.7
38.5
62.5
Notes
1. For all three state inputs, HIGH indicates a connection to V
CC
, LOW indicates a connection to GND, and MID indicates an open connection. Internal termination
circuitry holds an unconnected input to V
CC
/2.
2. The level to be set on FS is determined by the “normal” operating frequency (f
NOM
) of the V
CO
and Time Unit Generator (see ). Nominal frequency (f
NOM
) always
appears at 1Q0 and the other outputs when they are operated in their undivided modes (see
The frequency appearing at the REF and FB inputs is f
NOM
when the output connected to FB is undivided. The frequency of the REF and FB inputs is f
NOM
/2 or f
NOM
/4 when the part is configured for a frequency multiplication
using a divided output as the FB input.
3. When the FS pin is selected HIGH, the REF input must not transition upon power up until V
CC
has reached 2.8V.
Document Number: 38-07141 Rev. *C
Page 3 of 14