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CY7B9910-5SC 参数 Datasheet PDF下载

CY7B9910-5SC图片预览
型号: CY7B9910-5SC
PDF下载: 下载PDF文件 查看货源
内容描述: 低偏移的时钟缓冲器 [Low Skew Clock Buffer]
分类和应用: 时钟
文件页数/大小: 11 页 / 373 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7B9910
CY7B9920
Electrical Characteristics
Over the Operating Range
CY7B9910
Parameter
V
OH
V
OL
V
IH
V
IL
V
IHH
V
IMM
V
ILL
I
IH
I
IL
I
IHH
I
IMM
I
ILL
I
OS
I
CCQ
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
(REF and FB inputs only)
Input LOW Voltage
(REF and FB inputs only)
Three Level Input HIGH
Voltage (Test, FS)
Three Level Input MID
Voltage (Test, FS)
Three Level Input LOW
Voltage (Test, FS)
Input HIGH Leakage Current
(REF and FB inputs only)
Input LOW Leakage Current
(REF and FB inputs only)
Input HIGH Current
(Test, FS)
Input MID Current
(Test, FS)
Input LOW Current
(Test, FS)
Output Short Circuit
Current
Operating Current Used by
Internal Circuitry
Output Buffer Current per
Output Pair
Power Dissipation per
Output Pair
Min
V
CC
Max
Min
V
CC
Max
Min
V
CC
Max
V
CC
= Max, V
IN
= Max
V
CC
= Max, V
IN
= 0.4V
V
IN
= V
CC
V
IN
= V
CC
/2
V
IN
= GND
V
CC
= Max, V
OUT
= GND (25
°
C only)
V
CCN
= V
CCQ
= Max All
Input
Selects Open
V
CCN
= V
CCQ
= Max
I
OUT
= 0 mA
Input Selects Open, f
MAX
V
CCN
= V
CCQ
= Max
I
OUT
= 0 mA
Input Selects Open, f
MAX
Com’l
Mil/Ind
–50
–500
200
50
–200
–250
85
90
14
–50
Test Conditions
V
CC
= Min, I
OH
= –16 mA
V
CC
= Min, I
OH
=–40 mA
V
CC
= Min, I
OL
= 46 mA
V
CC
= Min, I
OL
= 46 mA
2.0
–0.5
V
CC
– 1V
V
CC
/2 –
500 mV
0.0
V
CC
0.8
V
CC
V
CC
/2 +
500 mV
1.0
10
–500
200
50
–200
N/A
85
90
19
mA
V
CC
1.35
–0.5
V
CC
– 1V
V
CC
/2 –
500 mV
0.0
0.45
0.45
V
CC
1.35
V
CC
V
CC
/2 +
500 mV
1.0
10
V
V
V
V
V
μA
μA
μA
μA
μA
mA
mA
Min
2.4
V
CC
–0.75
V
Max
CY7B9920
Min
Max
Unit
V
I
CCN
PD
78
104
[5]
mW
Notes
4. These inputs are normally wired to VCC, GND, or left unconnected (actual threshold voltages vary as a percentage of VCC). Internal termination resistors hold
unconnected inputs at VCC/2. If these inputs are switched, the function and timing of the outputs may glitch and the PLL may require an additional tLOCK time
before all data sheet limits are achieved.
5. Tested one output at a time, output shorted for less than one second, less than 10% duty cycle. Room temperature only. CY7B9920 outputs are not short circuit
protected.
6. Total output current per output pair is approximated by the following expression that includes device current plus load current:
CY7B9910:
ICCN = [(4 + 0.11F) + [((835 – 3F)/Z) + (.0022FC)]N] x 1.1
CY7B9920:
ICCN = [(3.5+.17F) + [((1160 – 2.8F)/Z) + (.0025FC)]N] x 1.1
Where
F = frequency in MHz
C = capacitive load in pF
Z = line impedance in ohms
N = number of loaded outputs; 0, 1, or 2
FC = F < C.
7. Total power dissipation per output pair is approximated by the following expression that includes device power dissipation plus power dissipation due to the load circuit:
CY7B9910:
PD = [(22 + 0.61F) + [((1550 – 2.7F)/Z) + (.0125FC)]N] x 1.1
CY7B9920:
PD = [(19.25+ 0.94F) + [((700 + 6F)/Z) + (.017FC)]N] x 1.1.See
note 3
for variable definition.
Document Number: 38-07135 Rev. *B
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