PLC LV Evaluation Board
3.3.4
Cypress Powerline Communication Transceiver and User Controls
This section is the heart of the board. It has the CY8CPLC10 chip, which has the integrated
transceiver modem and network protocol. It also has the I2C header to communicate with the
external host processor. The DIP switches to control the addresses and the jumpers to control the
functionality of the chip are also located here. The red, blue, yellow, and green LEDs indicate the
status of the board when functioning. The key components and their use are as follows:
Table 3-4. Transceiver and User Controls
Component
CY8CPLC10
Tx LED[DS2]
Rx LED[DS3]
Description
This is Cypress’s powerline transceiver device. It is a 28-pin SSOP device.
This is a green LED that glows when the board is transmitting data on to the powerline.
This is a red LED that glows when the CY8CPLC10 device is receiving data.
BIU LED [DS5] This is a yellow LED that glows when the transmit frequency band is in use.
S1
Reset switch to reset the CY8CPLC10 device.
These dip switches are used to set up the logical address of the node in the network. This
is an easy way for you to quickly assign an address from 0 to 7 to the board in a network.
S1[3] is MSB and S1[5] is LSB for logical address assignment.
S2[3-5]
This dip switch sets the I2C slave address to establish the communication with a host pro-
cessor. Setting the switch to OFF or ON sets the I2C address to external 0×01 or 0×7a
S2[2]
respectively.
This dip switch controls the clock setting to the CY8CPLC10. Setting the switch to 0 or 1
sets the FSK modem clock to external 32 kHz crystal or external 24 MHz oscillator,
respectively. Note that the external crystal is always required for protocol timing.
S2[1]
Y1
This 32.768 kHz crystal is required for establishing the correct protocol timing and commu-
nication signal frequencies of the CY8CPLC10.
The key components are circled in the following schematic.
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CY3273 Cypress Low Voltage Powerline Communication Evaluation Kit Guide, Doc. # 001-55382 Rev. *C
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