C9830
133 MHz Clock Generator for Intel
®
820 Chipset
Preliminary
Product Features
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Frequency Table
Supports Intel 820 Chipset
Supports 133 MHz Host bus Clocking
3 Frequency Programmable CPU Clock Outputs
3 3V66 AGP Clock Outputs
10 PCI clock Outputs
One 48 MHz USB Clock
One Selectable 24/48 MHz for SIO
One CPU/2 Clock Output for DRCG
3 Synchronous IOAPIC clock Outputs
Available in 48 Pin SSOP (300 mils)
I²C For Programmability
Spread Spectrum Technology for EMI Reduction
Frequency Stepping feature
Sel133
/100#
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
S2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
S1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
S0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
CPU
MHz
133.4
138
143
148
150
152.5
155
160
100.2
105
114
120
110
124
128.5
133.9
3V66
MHz
66.7
69
71.5
74
75
76.25
77.5
80
66.8
70
76
80
73.33
82.67
85.67
66.95
PCI
MHz
33.35
34.5
35.75
37
37.5
38.125
38.75
40
33.4
35
38
40
36.67
41.33
42.83
33.48
IOAPIC
MHz
16.675
17.25
17.875
18.5
18.75
19.06
19.375
20
16.7
17.5
19
20
18.33
20.67
21.42
16.74
Block Diagram
32pF
XIN
XBUF
500K
VDD
XOUT
32pF
PLL1
ioapic
3
1
VDDI
IOAPIC(0:2)
VDDCPU
Rin
S0
S1
S2
cpu
3
CPU(0:2)
VDDC_2
cpu/2
1
VDD
agp
3
VDD
SEL133/100#
pci
S133/100
I2CPMU
PD#
SCLK
SDATA
PD#
C
D
1
VDD
S1/PCI1
8
VDD
1
S2/PCI0
PCI(2:9)
3v66(0:2)
CPU/2
HDREF
Table 1
Pin Configuration
IOAPIC2
HDREF
VDD
XIN
XOUT
VSS
S2/PCI0
S1/PCI1
VDD
PCI2
PCI3
PCI4
PCI5
VSS
PCI6
PCI7
VDD
PCI8
PCI9
VSS
3V66_0
3V66_1
3V66_2
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VSS
VDDIO
IOAPIC0
IOAPIC1
VSS
VDDCPU_2
CPU/2
VSS
VDDCPU
CPU2
VSS
VDDCPU
CPU1
CPU0
SDATA
VDD
VSS
PD#
SCLK
VDD
SIO/24_48# MHz
48MHz/S0
VSS
SEL133/100#
PLL2
Rin
SIO
24_48#
1
SIO/24_48 MHz
48
1
VDD
48 MHz/S0
Fig. 1
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST
MILPITAS, CA 95035, USA TEL: 408-263-6300. FAX 408-263-6571
http://www.imicorp.com/
Rev 1.1
4/25/2000
Page 1 of 14
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