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C9819ATB 参数 Datasheet PDF下载

C9819ATB图片预览
型号: C9819ATB
PDF下载: 下载PDF文件 查看货源
内容描述: [Processor Specific Clock Generator, CMOS, PDSO48, TSSOP-48]
分类和应用: 光电二极管外围集成电路
文件页数/大小: 17 页 / 198 K
品牌: CYPRESS [ CYPRESS ]
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+/+when timing is critical  
C9819  
133 MHz I2C Clock Generator for Mobile Pentium®III / Rambus Systems  
Preliminary  
Maximum Ratings  
This device contains circuitry to protect the inputs  
against damage due to high static voltages or electric  
field; however, precautions should be taken to avoid  
application of any voltage higher than the maximum  
rated voltages to this circuit. For proper operation, Vin  
and Vout should be constrained to the range:  
Maximum Input Voltage Relative to VSS: VSS - 0.3V  
Maximum Input Voltage Relative to VDD: VDD + 0.3V  
Storage Temperature:  
Operating Temperature:  
Maximum ESD protection  
Maximum Power Supply:  
-65ºC to + 150ºC  
0ºC to +85ºC  
2000V  
5.5V  
VSS<(Vin or Vout)<VDD  
Unused inputs must always be tied to an appropriate  
logic voltage level (either VSS or VDD).  
DC Parameters  
Characteristic  
Symbol  
Min  
Typ  
Max  
1.0  
Units  
Vdc  
Vdc  
Vdc  
Vdc  
µA  
Conditions  
Input Low Voltage  
Input High Voltage  
Input Low Voltage  
Input High Voltage  
VIL1  
VIH1  
VIL2  
VIH2  
IIL  
-
-
Note 1  
2.0  
-
-
-
-
-
1.0  
-
Note 2  
2.2  
-66  
Input Low Current (@VIL =  
VSS)  
-5  
For internal Pull up resistors, Note 1  
and Note 3  
Input High Current (@VIL =  
VDD)  
IIH  
5
µA  
Tri-State leakage Current  
Dynamic Supply Current  
Dynamic Supply Current  
Static Supply Current  
Input pin capacitance  
Output pin capacitance  
Pin capacitance  
Ioz  
Idd3.3V  
Idd2.5V  
Isdd  
-
-
10  
160  
90  
µA  
mA  
mA  
µA  
pF  
pF  
nH  
pF  
V
-
-
Sel133/100# = 1, Note 4  
Sel133/100# = 1, Note 4  
-
-
-
-
400  
5
PwrDwn = 0, Sel133/100# = x, Note 4  
Cin  
-
-
Cout  
Lpin  
-
-
6
-
-
34  
7
Crystal pin capacitance  
Crystal DC Bias Voltage  
Crystal Startup time  
Cxtal  
VBIAS  
Txs  
32  
0.3Vdd  
-
38  
Measured from Pin to Ground. Note 5  
From Stable 3.3V power supply.  
Vdd/2  
-
0.7Vdd  
40  
µS  
VDD = VDDR = VDDP = VDD48 = VDD3V66 = 3.3V ±5%, VDDC = VDDC/2 = VDDI = 2.5 + 5%, TA = 0ºC to +85ºC  
Note1:  
Note2:  
Note3:  
Note4:  
Note5:  
Applicable to input signals: Sel133/100#, PWRDN#, CPU_stp#, PCI_stp#.  
Applicable to SDATA, and SCLK.  
Although internal pull-up resistors have a typical value of 250K, this value may vary between 200K and 500K.  
All outputs loaded as per table 6.  
Although the device will reliably interface with crystals of a 17pF 20pF CL range, it is optimized to interface with a typical CL = 18pF  
crystal specifications.  
INTERNATIONAL MICROCIRCUITS, INC 525 LOS COCHES ST.  
Rev 1.0  
11/1/1999  
MILPITAS, CA 95035, USA TEL: 408-263-6300 FAX 408-263-6571  
Page 10 of 17  
http://www.imicorp.com  
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