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BCM54907 参数 Datasheet PDF下载

BCM54907图片预览
型号: BCM54907
PDF下载: 下载PDF文件 查看货源
内容描述: [WICED™ IEEE 802.11 a/b/g/n/ac SoC with an Embedded Applications Processor]
分类和应用:
文件页数/大小: 95 页 / 1802 K
品牌: CYPRESS [ CYPRESS ]
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PRELIMINARY  
CYW54907  
7.2.3 TXE  
The transmit engine (TXE) constitutes the transmit data path of the MAC. It coordinates the DMA engines to store the transmit frames  
in the TXFIFO. It interfaces with the WEP module to encrypt frames and transfers the frames across the MAC-PHY interface at the  
appropriate time determined by the channel-access mechanisms.  
The data received from the DMAengines are stored in transmit FIFOs. The MAC has multiple logical queues to support traffic streams  
that have different QoS priority requirements. The PSM uses the channel access information from the IFS module to schedule a queue  
from which the next frame is transmitted. Once the frame is scheduled, the TXE hardware transmits the frame based on a precise  
timing trigger received from the IFS module.  
The TXE module also contains the hardware that allows the rapid assembly of MPDUs into an A-MPDU for transmission. The hardware  
module aggregates the encrypted MPDUs by adding appropriate headers and pad delimiters as needed.  
7.2.4 RXE  
The receive engine (RXE) constitutes the receive data path of the MAC. It interfaces with the DMAengine to drain the received frames  
from the RXFIFO. It transfers bytes across the MAC-PHY interface and interfaces with the WEP module to decrypt frames. The  
decrypted data is stored in the RXFIFO.  
The RXE module contains filters that are programmed by the PSM to accept or filter frames based on several criteria such as receiver  
address, BSSID, and certain frame types.  
The RXE module also contains the hardware required to detect A-MPDUs, parse the headers of the containers, and disaggregate  
them into component MPDUS.  
7.2.5 IFS  
The IFS module contains the timers required to determine interframe-space timing including RIFS timing. It also contains multiple  
backoff engines required to support prioritized access to the medium as specified by WMM.  
The interframe-spacing timers are triggered by the cessation of channel activity on the medium, as indicated by the PHY. These timers  
provide precise timing to the TXE to begin frame transmission. The TXE uses this information to send response frames or perform  
transmit frame-bursting (RIFS or SIFS separated, as within a TXOP).  
The backoff engines (for each access category) monitor channel activity, in each slot duration, to determine whether to continue or  
pause the backoff counters. When the backoff counters reach 0, the TXE gets notified so that it may commence frame transmission.  
In the event of multiple backoff counters decrementing to 0 at the same time, the hardware resolves the conflict based on policies  
provided by the PSM.  
The IFS module also incorporates hardware that allows the MAC to enter a low-power state when operating under the IEEE power  
save mode. In this mode, the MAC is in a suspended state with its clock turned off. A sleep timer, whose count value is initialized by  
the PSM, runs on a slow clock and determines the duration over which the MAC remains in this suspended state. When the timer  
expires, the MAC is restored to its functional state. The PSM updates the TSF timer based on the sleep duration, ensuring that the  
TSF is synchronized to the network.  
The IFS module also contains the PTA hardware that assists the PSM in Bluetooth coexistence functions.  
7.2.6 TSF  
The timing synchronization function (TSF) module maintains the TSF timer of the MAC. It also maintains the target beacon trans-  
mission time (TBTT). The TSF timer hardware, under the control of the PSM, is capable of adopting timestamps received from beacon  
and probe response frames in order to maintain synchronization with the network.  
The TSF module also generates trigger signals for events that are specified as offsets from the TSF timer, such as uplink and downlink  
transmission times used in PSMP.  
7.2.7 NAV  
The network allocation vector (NAV) timer module is responsible for maintaining the NAV information conveyed through the duration  
field of MAC frames. This ensures that the MAC complies with the protection mechanisms specified in the standard.  
The hardware, under the control of the PSM, maintains the NAV timer and updates the timer appropriately based on received frames.  
This timing information is provided to the IFS module, which uses it as a virtual carrier-sense indication.  
Document Number: 002-19312 Rev. *C  
Page 28 of 95  
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