欢迎访问ic37.com |

会员登录免费注册

会员中心

企业资讯人才招聘

电子百科

电子百科

Datasheet下载 IC品牌缩略语技术文章 IC型号

产品导航

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9

搜索

发布采购

BCM43570KFFBG 参数 Datasheet PDF下载

BCM43570KFFBG图片预览

型号：	BCM43570KFFBG
PDF下载：	下载PDF文件查看货源
内容描述：	[Single-Chip 5G WiFi IEEE 802.11ac 2Ã2MAC/Baseband/Radio with IntegratedBluetooth 4.1 and EDR]
分类和应用：
文件页数/大小：	93 页 / 8056 K
品牌：	CYPRESS [ CYPRESS ]

浏览型号BCM43570KFFBG的Datasheet PDF文件第10页

浏览型号BCM43570KFFBG的Datasheet PDF文件第11页

浏览型号BCM43570KFFBG的Datasheet PDF文件第12页

浏览型号BCM43570KFFBG的Datasheet PDF文件第13页

浏览型号BCM43570KFFBG的Datasheet PDF文件第15页

浏览型号BCM43570KFFBG的Datasheet PDF文件第16页

浏览型号BCM43570KFFBG的Datasheet PDF文件第17页

浏览型号BCM43570KFFBG的Datasheet PDF文件第18页

ADVANCE

CYW43570

3.2 External Frequency Reference

Table 4. Crystal Oscillator and External Clock—Requirements and Performance

External Frequency

Reference^{b c}

Crystal^a

Parameter

Conditions/Notes

Min

Typ

Max

Min Typ Max Units

Frequency

2.4G and 5G bands: IEEE 802.11ac –

operation

40

–

–

–

–

MHz

Frequency tolerance over the

lifetime of the equipment, including

temperature^d

Without trimming

–20

–

20

–20

–

20

ppm

Crystal load capacitance

ESR

–

–

–

12

–

–

–

–

–

–

–

–

–

–

–

pF

Ω

–

60

–

Drive level

External crystal must be able to

tolerate this drive level.

200

–

μW

Input impedance (WRF_XTAL_IN) Resistive

Capacitive

–

–

–

–

–

–

–

30

–

100

–

–

kΩ

pF

V

7.5

–

7.5

0.2

WRF_XTAL_IN

Input low level

DC-coupled digital signal

0

–

WRF_XTAL_IN

Input high level

DC-coupled digital signal

AC-coupled analog signal

–

–

–

–

–

–

1.0

–

–

1.26

V

WRF_XTAL_IN

input voltage

400

1200 mV_p-p

60

Duty cycle

Phase Noise^e

(IEEE 802.11b/g)

40 MHz clock

–

–

–

–

–

–

40

–

50

–

%

40 MHz clock at 10 kHz offset

–129 dBc/

Hz

40 MHz clock at 100 kHz offset

40 MHz clock at 10 kHz offset

40 MHz clock at 100 kHz offset

40 MHz clock at 10 kHz offset

40 MHz clock at 100 kHz offset

40 MHz clock at 10 kHz offset

40 MHz clock at 100 kHz offset

40 MHz clock at 10 kHz offset

40 MHz clock at 100 kHz offset

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–136 dBc/

Hz

Phase Noise^e

–137 dBc/

Hz

(IEEE 802.11a)

–144 dBc/

Hz

Phase Noise^e

(IEEE 802.11n, 2.4 GHz)

–134 dBc/

Hz

–141 dBc/

Hz

Phase Noise^e

(IEEE 802.11n, 5 GHz)

–142 dBc/

Hz

–149 dBc/

Hz

Phase Noise^e

(IEEE 802.11ac, 5 GHz)

–150 dBc/

Hz

–157 dBc/

Hz

a. (Crystal) Use WRF_XTAL_IN and WRF_XTAL_OUT.

b. See 3.2 External Frequency Reference for alternative connection methods.

c. For a clock reference other than 40 MHz, 20 × log10(f/40) dB should be added to the limits, where f = the reference clock frequency in MHz.

d. It is the responsibility of the equipment designer to select oscillator components that comply with these specifications.

e.Assumes that the external clock has a flat phase noise response above 100 kHz.

Document Number: 002-15054 Rev. *I

Page 14 of 94

IC37:专业IC行业平台

专业IC领域供求交易平台:提供全面的IC Datasheet资料和资讯，Datasheet 1000万数据，IC品牌1000多家。

网站导航 Datasheet资料库电子术语电子百科

服务中心 常见问题委托交易会员服务

关于我们 公司简介联系我们免责申明

产品索引：A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9

深圳网络警察报警平台公共信息安全网络监察经营性网站备案信息不良信息举报中心工商网监电子标识全国公安机关备案

服务电话： 0755-32882616 0755-32882606 0755-32882608 0755-32882607 值班和投诉电话：13715251531 ©2004-2024 IC37网版权所有：ic37.com 版权申明公网安备44030402000606 粤ICP备13051289号-6

复制成功！