BCM4354 Data Sheet
Signal Descriptions
Table 22: WLBGA Signal Descriptions
Type Description
Ball#
Signal Name
WLAN SDIO Bus Interface
Note: These signals can support alternate functionality depending on package and host interface mode. See
Table 26: “GPIO Alternative Signal Functions,” on page 120 for additional details.
A8
A9
B9
C9
B8
C8
SDIO_CLK
I
SDIO clock input
SDIO_CMD
I/O SDIO command line
I/O SDIO data line 0
I/O SDIO data line 1
I/O SDIO data line 2
I/O SDIO data line 3
SDIO_DATA_0
SDIO_DATA_1
SDIO_DATA_2
SDIO_DATA_3
WLAN HSIC Interface
A7
A6
D7
HSIC_STROBE
HSIC_DATA
RREFHSIC
I/O HSIC Strobe
I/O HSIC Data
I
HSIC reference resistor input. If HSIC is used,
connect this pin to ground via a 51-ohm 5% resistor.
On SDIO designs this pin should not be connected.
WLAN GPIO Interface
Note: The GPIO signals can be multiplexed via software and the JTAG_SEL pin to support other functions.
See Table 23: “WLAN GPIO Functions and Strapping Options,” on page 119 and Table 26: “GPIO Alternative
Signal Functions,” on page 120 for additional details.
G11
F10
F11
G9
H9
F9
F8
E7
F7
E6
H12
–
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
I/O Programmable GPIO pins
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
–
–
–
Broadcom®
October 15, 2014 • 4354-DS109-R
Page 113
BROADCOM CONFIDENTIAL
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