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BCM4343SKUBG 参数 Datasheet PDF下载

BCM4343SKUBG图片预览
型号: BCM4343SKUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip IEEE 802.11 b/g/n MAC/ Baseband/Radio with Bluetooth 4.1,an FM Receiver, and Wireless Charging]
分类和应用: 无线
文件页数/大小: 127 页 / 10739 K
品牌: CYPRESS [ CYPRESS ]
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CYW4343X  
Table 22. WLBGA Signal Descriptions (Cont.)  
Signal Name  
WLBGA Ball  
Type  
Description  
Bluetooth UART and Wake  
BT_UART_CTS_N  
B2  
C3  
A1  
A2  
I
UART clear-to-send. Active-low clear-to-send signal for  
the HCI UART interface.  
BT_UART_RTS_N  
BT_UART_RXD  
BT_UART_TXD  
O
I
UART request-to-send. Active-low request-to-send  
signal for the HCI UART interface.  
UART serial input. Serial data input for the HCI UART  
interface.  
O
UART serial output. Serial data output for the HCI UART  
interface.  
BT_DEV_WAKE  
BT_HOST_WAKE  
B1  
C1  
I/O  
I/O  
DEV_WAKE or general-purpose I/O signal.  
HOST_WAKE or general-purpose I/O signal.  
Note: By default, the Bluetooth BT WAKE signals provide GPIO/WAKE functionality, and the UART pins provide UART functionality.  
Through software configuration, the PCM interface can also be routed over the  
BT_WAKE/UART signals as follows:  
PCM_CLK on the UART_RTS_N pin  
PCM_OUT on the UART_CTS_N pin  
PCM_SYNC on the BT_HOST_WAKE pin  
PCM_IN on the BT_DEV_WAKE pin  
In this case, the BT HCI transport included sleep signaling will operate using UART_RXD and UART_TXD; that is, using a 3-Wire UART  
Transport.  
Bluetooth/FM I2S  
I2S or PCM clock; can be master (output) or slave (input)  
I2S or PCM data output  
BT_I2S_CLK or BT_PCM_CLK  
BT_I2S_DO or BT_PCM_OUT  
BT_I2S_WS or BT_PCM_SYNC  
A4  
B3  
A3  
I/O  
I/O  
I/O  
I2S WS or PCM sync; can be master (output) or slave  
(input)  
Miscellaneous  
WL_REG_ON  
BT_REG_ON  
G6  
E6  
I
Used by PMU to power up or power down the internal  
regulators used by the WLAN section. Also, when  
deasserted, this pin holds the WLAN section in reset.  
This pin has an internal 200 kpull-down resistor that is  
enabled by default. It can be disabled through  
programming.  
I
Used by PMU to power up or power down the internal  
regulators used by the Bluetooth/FM section. Also, when  
deasserted, this pin holds the Bluetooth/FM section in  
reset. This pin has an internal 200 kpull-down resistor  
that is enabled by default. It can be disabled through  
programming.  
WPT_3P3  
WPT_1P8  
GPIO_0  
E5  
D5  
J6  
N/A  
N/A  
I/O  
Not used. Do not connect to this pin.  
Not used. Do not connect to this pin.  
Programmable GPIO pins. This pin becomes an output  
pin when it is used as WLAN_HOST_WAKE/out-of-band  
signal.  
GPIO_1  
H6  
L5  
K4  
K5  
J1  
I/O  
I/O  
I/O  
I/O  
I
Programmable GPIO pins  
Programmable GPIO pins  
Programmable GPIO pins  
Programmable GPIO pins  
GPIO_2  
GPIO_3  
GPIO_4  
WLRF_2G_eLG  
Connect to an external inductor. See the reference  
schematic for details.  
Document No. 002-14797 Rev. *H  
Page 80 of 128  
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