PRELIMINARY
CYW43438
Table 17. WLBGA Signal Descriptions (Cont.)
WLBGA
Signal Name
Ball
Type
Description
Bluetooth UART and Wake
UART clear-to-send. Active-low clear-to-send signal for the HCI UART
interface.
BT_UART_CTS_N
BT_UART_RTS_N
B2
C3
I
UART request-to-send. Active-low request-to-send signal for the HCI UART
interface.
O
BT_UART_RXD
BT_UART_TXD
BT_DEV_WAKE
BT_HOST_WAKE
A1
A2
B1
C1
I
UART serial input. Serial data input for the HCI UART interface.
UART serial output. Serial data output for the HCI UART interface.
DEV_WAKE or general-purpose I/O signal.
O
I/O
I/O
HOST_WAKE or general-purpose I/O signal.
Note: By default, the Bluetooth BT WAKE signals provide GPIO/WAKE functionality, and the UART pins provide UART functionality.
Through software configuration, the PCM interface can also be routed over the BT_WAKE/UART signals as follows:
■ PCM_CLK on the UART_RTS_N pin
■ PCM_OUT on the UART_CTS_N pin
■ PCM_SYNC on the BT_HOST_WAKE pin
■ PCM_IN on the BT_DEV_WAKE pin
In this case, the BT HCI transport included sleep signaling will operate using UART_RXD and UART_TXD; that is, using a 3-Wire
UART Transport.
Miscellaneous
Used by PMU to power up or power down the internal regulators used by the
WLAN section. Also, when deasserted, this pin holds the WLAN section in
reset. This pin has an internal 200 k pull-down resistor that is enabled by
default. It can be disabled through programming.
WL_REG_ON
G6
I
Used by PMU to power up or power down the internal regulators used by the
Bluetooth/FM section. Also, when deasserted, this pin holds the Bluetooth/
FM section in reset. This pin has an internal 200 k pull-down resistor that
is enabled by default. It can be disabled through programming.
BT_REG_ON
GPIO_0
E6
J6
I
Programmable GPIO pins. This pin becomes an output pin when it is used
as WLAN_HOST_WAKE/out-of-band signal.
I/O
GPIO_1
H6
L5
J1
I/O
I/O
I
Programmable GPIO pins
GPIO_2
Programmable GPIO pins
WLRF_2G_eLG
Connect to an external inductor. See the reference schematic for details.
Integrated Voltage Regulators
SR_VDDBAT5V
SR_VLX
B7
A6
I
SR VBAT input power supply
CBUCK switching regulator output. See Table 36 for details of the inductor
and capacitor required on this output.
O
LDO_VDDBAT5V
LDO_VDD1P5
VOUT_LNLDO
VOUT_CLDO
F7
C7
D6
C6
I
LDO VBAT
I
LNLDO input
O
O
Output of low-noise LNLDO
Output of core LDO
Bluetooth Power Supplies
Bluetooth PA power supply
Bluetooth IF block power supply
Bluetooth RF PLL power supply
Bluetooth RF power supply
BT_PAVDD
H1
G1
F2
F1
I
I
I
I
BT_IF_VDD
BTFM_PLL_VDD
BT_VCO_VDD
Document Number: 002-14796 Rev. *K
Page 60 of 101
CYPRESS [ CYPRESS ]
