PRELIMINARY
CYW43438
10.2 UART Interface
The CYW43438 shares a single UART for Bluetooth and FM. The UART is a standard 4-wire interface (RX, TX, RTS, and CTS) with
adjustable baud rates from 9600 bps to 4.0 Mbps. The interface features an automatic baud rate detection capability that returns a
baud rate selection. Alternatively, the baud rate may be selected through a vendor-specific UART HCI command.
The UART has a 1040-byte receive FIFO and a 1040-byte transmit FIFO to support EDR. Access to the FIFOs is conducted through
the Advanced High Performance Bus (AHB) interface through either DMA or the CPU. The UART supports the Bluetooth 4.1 UART
HCI specification: H4 and H5. The default baud rate is 115.2 Kbaud.
The UART supports the 3-wire H5 UART transport as described in the Bluetooth specification (Three-wire UART Transport Layer).
Compared to H4, the H5 UART transport reduces the number of signal lines required by eliminating the CTS and RTS signals.
The CYW43438 UART can perform XON/XOFF flow control and includes hardware support for the Serial Line Input Protocol (SLIP).
It can also perform a wake-on activity function. For example, activity on the RX or CTS inputs can wake the chip from a sleep state.
Normally, the UART baud rate is set by a configuration record downloaded after device reset or by automatic baud rate detection, and
the host does not need to adjust the baud rate. Support for changing the baud rate during normal HCI UART operation is included
through a vendor-specific command that allows the host to adjust the contents of the baud rate registers. The CYW43438 UARTs
operate correctly with the host UART as long as the combined baud rate error of the two devices is within ±2% (see Table 13).
Table 13. Example of Common Baud Rates
Desired Rate
4000000
3692000
3000000
2000000
1500000
1444444
921600
460800
230400
115200
57600
Actual Rate
4000000
3692308
3000000
2000000
1500000
1454544
923077
461538
230796
115385
57692
Error (%)
0.00
0.01
0.00
0.00
0.00
0.70
0.16
0.16
0.17
0.16
0.16
0.00
0.16
0.00
0.16
0.00
38400
38400
28800
28846
19200
19200
14400
14423
9600
9600
UART timing is defined in Figure 27 and Table 14.
Document Number: 002-14796 Rev. *K
Page 46 of 101
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