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BCM4330FKUBG 参数 Datasheet PDF下载

BCM4330FKUBG图片预览
型号: BCM4330FKUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PBGA133, WLBGA-133]
分类和应用:
文件页数/大小: 168 页 / 1861 K
品牌: CYPRESS [ CYPRESS ]
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BCM4330 Preliminary Data Sheet  
Pinout and Signal Descriptions  
Section 14: Pinout and Signal Descriptions  
Signal Assignments  
Figure 38 shows the FCFBGA ball map. Figure 39 shows the WLBGA ball map. Figure 40 shows the WLCSP bump  
map.  
Table 17 on page 98 contains the WLCSP bump coordinates.  
Table 18 on page 105 contains the signal description for all packages.  
1
2
3
4
A
B
C
D
E
WRF_RFIN_5G  
WRF_RFOUT_5G  
WRF_GNDLNA_5G  
WRF_LOGEN_A_GND  
WRF_VDDANA_1P2  
WRF_VCO_GND  
WRF_TCXO_IN  
WRF_XTAL_GND  
WL_GPIO_0  
WRF_VDDPA_5G  
WRF_A_TSSI_IN  
WRF_ANA_GND  
WRF_VCOLDO_OUT_1P2  
WRF_VDDAFE_1P2  
WRF_AFE_GND  
WRF_XTAL_VDD1P2  
WL_GPIO_2  
WRF_VDDPA_2G  
WRF_GNDPA_5G  
WRF_PADRV_VDD  
WRF_GPIO_OUT  
WRF_RES_EXT  
BT_PCM_IN  
WRF_VDDLNA_1P2_5G  
WRF_LOGEN_A_VDD1P2  
WRF_VDD_VCOLDO_IN_1P8  
WRF_TCXO_VDD  
WRF_XTAL_OP  
F
G
H
J
WRF_XTAL_ON  
WL_GPIO_1  
HSIC_AVDD12  
WL_GPIO_4  
WL_GPIO_6  
WL_VDDC  
WL_GPIO_3  
VSSC  
K
L
M
HSIC_STROBE  
HSIC_DATA  
RF_SW_CTRL_5  
HSIC_AVSS  
HSIC_RREF  
RF_SW_CTRL_1  
RF_SW_CTRL_7  
RF_SW_CTRL_2  
RF_SW_CTRL_0  
VDDIO_RF  
RF_SW_CTRL_4  
RF_SW_CTRL_6  
5
6
WRF_RFIN_2G  
WRF_VDDLNA_1P2_2G  
WRF_GNDLNA_2G  
BT_UART_CTS_N  
BT_UART_RXD  
BT_UART_RTS_N  
VSSC  
7
8
BT_RF  
BT_FEVSS  
A
B
C
D
E
WRF_RFOUT_2G  
WRF_GNDPA_2G  
WRF_PADRV_GND  
WRF_G_TSSI_IN  
BT_PCM_CLK  
BT_PCM_SYNC  
BT_PCM_OUT  
WL_GPIO_5  
BT_PAVDD3P3  
BT_IFVDD1P2  
BT_IFVSS  
BT_CLK_REQ_IN  
BT_UART_TXD  
WL_VDDC  
VSSC  
BT_VSS  
BT_CLK_REQ_POL  
BT_CLK_REQ_MODE  
BT_VDDC  
VSSC  
BT_I2S_WS  
BT_VDDC  
BT_VDDC  
SDIO_DATA_3  
SDIO_DATA_2  
F
G
H
J
K
L
WL_VDDC  
VSSC  
WL_VDDIO  
WL_VDDC  
LPO  
VSSC  
RF_SW_CTRL_3  
JTAG_SEL  
BT_VDDIO  
VDD_ISLAND  
SDIO_DATA_0  
SDIO_CMD  
M
SDIO_DATA_1  
SDIO_CLK  
9
10  
11  
12  
A
B
C
D
E
BT_LNAVDD1P2  
BT_RFVSS  
BT_VCOVSS  
BT_PLLVSS  
FM_VSS  
BT_GPIO_0  
BT_I2S_CLK  
BT_I2S_DO  
EXT_SMPS_REQ  
BT_REG_ON  
WL_REG_ON  
VOUT_CLDO  
BT_VCOVDD1P2  
BT_PLLVDD1P2  
FM_VSSAUDIO  
FM_PLLVSS  
FM_VDD2P5  
BT_RST_N  
BT_I2S_DI  
BT_GPIO_5  
EXT_PWM_REQ  
PMU_AVSS  
VOUT_LNLDO1  
VIN_LDO  
FM_AOUT1  
FM_VDDAUDIO  
FM_IFVDD1P2  
FM_RFVSS  
FM_VSSVCO  
BT_TM0  
BT_GPIO_4  
BT_GPIO_1  
VOUT_3P1  
SR_VDDBAT2  
SR_VLX  
FM_AOUT2  
FM_TX  
FM_RFVDD_1P2  
FM_RXN  
FM_RXP  
F
BT_CLK_REQ_OUT  
BT_GPIO_2  
BT_GPIO_3  
VOUT_3P3  
SR_VDDBAT1  
SR_VDDBAT1  
SR_VLX  
G
H
J
K
L
M
SR_PVSS  
Figure 38: 144-FCFBGA Ball Map (Top View)  
®
BROADCOM  
BCM4330 Preliminary Data Sheet  
April 28, 2011 • 4330-DS304-RI  
Page 95  
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