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BCM4330FKUBG 参数 Datasheet PDF下载

BCM4330FKUBG图片预览
型号: BCM4330FKUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PBGA133, WLBGA-133]
分类和应用:
文件页数/大小: 168 页 / 1861 K
品牌: CYPRESS [ CYPRESS ]
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BCM4330 Preliminary Data Sheet  
WLAN PHY Description  
CCK/DSSS Demodulate  
Filters and Radio  
Comp  
Frequency and  
Timing Synch  
Descramble and  
Deframe  
OFDM Demodulate  
Viterbi Decoder  
Carrier Sense, AGC, and  
Rx FSM  
Buffers  
MAC  
Radio Control Block  
FFT/IFFT  
Interface  
AFE and  
Radio  
Tx FSM  
Modulation and  
Coding  
Common Logic Block  
Frame and  
Scramble  
Filters and Radio Comp  
PA Comp  
Modulate/Spread  
COEX  
Figure 35: WLAN PHY Block Diagram  
The PHY is capable of fully calibrating the RF front end to extract the highest performance. On power-up, the  
PHY performs a full suite of calibration to correct for IQ mismatch and local oscillator leakage. The PHY also  
performs periodic calibration to compensate for any temperature related drift thus maintaining high-  
performance over time. A closed loop transmit control algorithm maintains the output power to required level  
with capability control Tx power on a per packet basis.  
One of the key feature of the PHY is two space-time stream receive capability. The STBC scheme can obtain  
diversity gains by using multiple transmit antennas in AP (Access Point) in a fading channel environment,  
without increasing the complexity at the STA. Details of the STBC receive is shown in the block diagram shown  
in Figure 36 on page 92.  
®
BROADCOM  
BCM4330 Preliminary Data Sheet  
April 28, 2011 • 4330-DS304-RI  
Page 91  
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