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BCM4325FKWBG 参数 Datasheet PDF下载

BCM4325FKWBG图片预览
型号: BCM4325FKWBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PBGA339, WLCSP-339]
分类和应用: 电信电信集成电路
文件页数/大小: 139 页 / 2480 K
品牌: CYPRESS [ CYPRESS ]
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BCM4325  
Preliminary Data Sheet  
6/30/09  
SLOT MAPPING  
The BCM4325 supports up to three simultaneous full-duplex SCO or eSCO channels. These three channels are time  
multiplexed onto the single PCM interface by using a time slotting scheme where the 8-kHz audio sample interval is divided  
into up to 16 slots. The number of slots is dependant on the selected interface rate of 128 kHz, 256 kHz, 512 kHz, 1024 kHz,  
or 2048 kHz. The corresponding number of slots for these interface rates is one, two, four, eight and 16, respectively.  
Transmit and receive PCM data from an SCO channel is always mapped to the same slot. The PCM data output driver  
tristates its output on unused slots to allow other devices to share the same PCM interface signals. The data output driver  
tristates its output after the falling edge of the PCM clock during the last bit of the slot.  
FRAME SYNC  
The BCM4325 supports both short and long frame sync types in both master and slave configurations. In the short frame  
sync mode, the frame sync signal is an active-high pulse at the 8 kHz audio frame rate that is a single-bit period in width and  
synchronized to the rising edge of the bit clock. The PCM slave looks for a high on the falling edge of the bit clock and expects  
the first bit of the first slot to start at the next rising edge of the clock. In the long frame sync mode, the frame sync signal is  
again an active-high pulse at the 8 kHz audio frame rate; however, the duration is three bit periods and the pulse starts  
coincident with the first bit of the first slot.  
DATA FORMATTING  
The BCM4325 may be configured to generate and accept several different data formats. The BCM4325 uses 13 of the 16  
bits in each PCM frame. The location and order of these 13 bits is configurable to support various data formats on the PCM  
interface. The remaining three bits are ignored on the input, and may be filled with 0s, 1s, sign bit, or a programmed value  
on the output. The default format is 13-bit, 2’s complement data, left-justified, and clocked MSB first.  
PCM INTERFACE FOR FM AUDIO  
The BCM4325 also supports a mode where the FM stereo audio is output over the PCM Interface in master or slave mode.  
A BT_PCM_SYNC sample rate of 48 kHz is supported with associated BT_PCM_CLK rate of 1.536 MHz. The  
BT_PCM_SYNC signal follows the short frame sync format. In this FM audio mode, the BT_PCM_IN signal is ignored and  
FM audio is output on the BT_PCM_OUT signal. The FM stereo audio is presented MSB first onto the BT_PCM_OUT signal  
with the 16 bits of left-channel data first followed by the 16 bits of right-channel data.  
BLUETOOTH UART INTERFACE  
The Bluetooth UART physical interface is a standard, 4-wire interface (RX, TX, RTS, CTS) with adjustable baud rates from  
9600 bps to 4.0 Mbps. The interface features an automatic baud rate detection capability that returns a baud rate selection.  
Alternatively, the baud rate may be selected via a vendor specific UART HCI command. The BCM4325 has a 480-byte  
receive FIFO and a 480-byte transmit FIFO to support EDR. The interface supports the Bluetooth 3.0 UART HCI  
specification.  
The BCM4325 has the added capability to perform wake-on-activity, where it can be asleep and have activity on the RX or  
CTS inputs to wake up the chip.  
Broadcom Corporation  
Page 20  
Bluetooth UART Interface  
Document 4325-DS04-R