ADVANCE
CYW43143
Figure 7. PHY Block Diagram
CCK/DSSS
Demodulate
Filters and
Radio Comp
Frequency and
Timing Synch
OFDM
Demodulate
Viterbi
Decoder
Descramble
and Deframe
Carrier Sense,
AGC, and Rx
FSM
Buffers
Radio
Control
Block
MAC
Interface
FFT/IFFT
AFE
and
Radio
Modulation
and Coding
Tx FSM
Common Logic
Block
Frame and
Scramble
Filters and
Radio Comp
Modulate and
Spread
PA Comp
COEX
6.3 Single-Band Radio Transceiver
The CYW43143 has a 2.4 GHz radio transceiver that ensures low power consumption and robust communication in 20 MHz and
40 MHz channel bandwidths as specified in IEEE 802.11n.
6.3.1 Receiver Path
The CYW43143 has a wide dynamic range, direct conversion receiver. It employs high-order, on-chip channel filtering to ensure
reliable operation in the noisy 2.4 GHz ISM band. The excellent noise figure of the receiver makes an external LNA unnecessary.
6.3.2 Transmitter Path
Baseband data is modulated and upconverted to the 2.4 GHz ISM band. Linear on-chip power amplifiers are included, which are
capable of delivering a nominal output power exceeding +15 dBm while meeting the IEEE 802.11n specification. The TX gain has 128
steps of 0.25 dB per step.
6.3.3 Calibration
The CYW43143 features dynamic on-chip calibration, eliminating process variation across components. This enables the device to
be used in high-volume applications because calibration routines are not required during manufacturing. These calibration routines
are performed periodically in the course of normal radio operation.
Document Number: 002-15045 Rev. *F
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