ADVANCE
CYW43143
6. Wireless LAN MAC and PHY
6.1 IEEE 802.11n MAC Description
The IEEE 802.11n MAC features include:
■ Enhanced MAC for supporting 802.11n features
■ Programmable Access Point (AP) or Station (STA) functionality
■ Programmable mode selection as Independent Basic Service Set (IBSS) or infrastructure
■ Aggregated MAC Protocol Data Unit (MPDU) support for High Throughput (HT)
■ Passive scanning
■ Network Allocation Vector (NAV), Interframe Space (IFS), and Timing Synchronization Function (TSF) functionality
■ RTS/CTS procedure support
■ Transmission of response frames (ACK/CTS)
■ Address filtering of receive frames as specified by IBSS rules
■ Multirate support
■ Programmable Target Beacon Transmission Time (TBTT), beacon transmission/cancellation, and Announcement Traffic Indication
Message (ATIM) window
■ Coordination Function (CF) conformance: Setting a NAV for neighborhood Point Coordination Function (PCF) operation
■ Security through a variety of encryption schemes including WEP, TKIP, AES, WPA, WAP2, and IEEE 802.1X
■ Power management
■ Statistics counters for MIB support
The MAC core supports the transmission and reception of packet sequences, together with related timing, without any packet-by-
packet driver interaction. Time-critical tasks requiring response times of only a few milliseconds are handled in the MAC core. This
achieves the required medium timing while minimizing driver complexity. Also, the MAC driver processes incoming packets that have
been buffered in the MAC core in bursts, enabling high bandwidth performance.
The MAC driver interacts with the MAC core to prepare transmit packet queues and to analyze and forward received packets to upper
software layers. The internal blocks of the MAC core are connected to a Programmable State Machine (PSM) through the host
interface that connects to the internal bus (see Figure 6 on page 11).
Figure 6. Enhanced MAC Block Diagram
Host Interface (Host Registers)
Six TX FIFOs
TX Status FIFO
RX FIFO
Code Memory
Templates
TX Engine
Programmable
State Machine
(PSM)
Power
Management
Wireless Security Engine
Timing and
Control
RX Engine
Data Memory
PHY Interface
The host interface consists of registers for controlling and monitoring the status of the MAC core and interfacing with the TX/RX FIFOs.
For transmission, 32 KB of FIFO buffering is available that can be dynamically allocated to six transmit queues plus template space
for beacons, ACKs, and probe responses. Whenever the host has a frame to transmit, the host queues the frame into one of the
transmit FIFOs with a TX descriptor containing TX control information. The PSM schedules the transmission on the medium depending
Document Number: 002-15045 Rev. *F
Page 11 of 44
CYPRESS [ CYPRESS ]
