PRELIMINARY
CYW20713
Table 8. CYW20713 Signal Descriptions (Cont.)
FPBGA
50-Ball
WLBGA
Power Do-
Signal
I/O
Description
42-Bump
E1
D1
C1
E2
D4
E4
C4
A4
–
main
SCL
SDA
I2C clock
I2C data
F7
E7
A8
C7
F6
G6
F4
F5
B6
E4
E5
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
SPIM_CLK
SPIM_CS_N
PCM_IN
PCM_OUT
PCM_CLK
PCM_SYNC
COEX_IN
COEX_OUT0
COEX_OUT1
OTP_DIS
Supplies
VDDIF
Serial flash SPI clock
Serial flash active-low chip select
PCM/I2S data input
PCM/I2S data output
PCM/I2S clock
PCM sync/I2S word select
Coexistence input
Coexistence output
–
Coexistence output
–
OTP disable pin. By default, leave this pin floating.
A2
Radio IF PLL supply
Radio PA supply
Radio LNA supply
Radio supply
B1
C1
E1
F1
G1
A5
B8
F8
G5
A6
G8
–
–
I
I
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
VDDTF
VDDLNA
VDDRF
VDDPX
VDDC
B7
–
I
E7
F7
A3
F1
–
I
Radio RF PLL supply
Core logic supply
Core logic supply
Core logic supply
Digital I/O supply voltage
Digital I/O supply voltage
Digital I/O supply voltage
No connect
I
I
VDDC
I
VDDC
I
VDDO
D3
–
I
VDDO
I
VDDO
–
I
NC
B1
D7
B6
E6
F6
F3
A1
–
I
VSS
Ground
C2
D2
F2
D3
C6
A7
G7
–
–
–
–
–
–
–
–
–
VSS
Ground
VSS
Ground
VSS
Ground
VSS
Ground
VSS
Ground
VSS
Ground
VSS
Ground
B2
Document Number: 002-14806 Rev. *C
Page 26 of 52
CYPRESS [ CYPRESS ]
