PRELIMINARY
CYW20710
Table 2. Power Control Pin Summary
Pin
Direction
Description
BT_WAKE (GPIO_0)
Host output
BT input
Bluetooth device wake-up: Signal from the host to the Bluetooth device that the host
requires attention.
•
Asserted = Bluetooth device must wake up or remain awake.
•
Deasserted = Bluetooth device may sleep when sleep criteria are met.
The polarity of this signal is software configurable and can be asserted high or low. By
default, BT_WAKE is active-low (if BT-WAKE is low it requires the device to wake up or
remain awake).
HOST_WAKE (GPIO_1) BT output
Host input
Host wake-up. Signal from the Bluetooth device to the host indicating that Bluetooth
device requires attention.
•
Asserted = Host device must wake up or remain awake.
•
Deasserted = Host device may sleep when sleep criteria are met.
The polarity of this signal is software configurable and can be asserted high or low.
CLK_REQ (GPIO_5)
REG_EN
BT output
BT input
Clock request
•
•
Asserted = External clock reference required
Deasserted = External clock reference may be powered down
The polarity of CLK_REQ is software configurable and can be set to active high (TM0
= 1) or active low (TM0 = 0).
Enables the internal preregulator and main regulator outputs. REG_EN is active-high.
•
•
1 = Enabled
0 = Disabled
3.6.3 Bluetooth Baseband Core Power Management
The device provides the following low-power operations for the Bluetooth Baseband Core (BBC):
■
■
Physical layer packet handling turns RF on and off dynamically within packet TX and RX.
Bluetooth specified low-power connection modes—Sniff, Hold, and Park. While in these low-power connection modes, the device
runs on the Low Power Oscillator and wakes up after a predefined time period.
Backdrive Protection
The CYW20710 provides a backdrive protection feature that allows the device to be turned off while the host and other devices in the
system remain operational. When the device is not needed in the system, VDD_RF and VDDC are shut down and VDDO remains
powered. This allows the device to be effectively off, while keeping the I/O pins powered so that they do not draw extra current from
other devices connected to the I/O.
Note: VDD_RF collectively refers to the VDDTF, VDDIF, VDDLNA, VDDPX, and VDDRF RF power supplies.
Note: Never apply voltage to I/O pins if VDDO is not applied.
During the low power shutdown state and as long as VDDO remains applied to the device, all outputs are tristated and all digital and
analog clocks are disabled. Input voltages must remain within the limits defined for normal operation. This is done to either prevent
current draw and back loading on digital signals in the system. It also enables the device to be fully integrated in an embedded device
and take full advantage of the lowest power savings modes. If VDDC is powered up externally (not connected to VREG), VDDC
requires 750K ohms to ground during low-power shutdown. If VDDC is powered up by VREG, VDDC does not require 750K ohms to
ground because the internal main LDO has about 750 K ohms to ground when turned off.
Several signals, including the frequency reference input (XTAL_IN) and external LPO input (LPO_IN), are designed to be high-
impedance inputs that will not load down the driving signal, even if VDDO power is not applied to the chip. The other signals with back
drive prevention are RST_N, COEX_OUT0, COEX_OUT1, COEX_IN, PCM_SYNC, PCM_CLK, PCM_OUT, PCM_IN, UART_RTS_N,
UART_CTS_N, UART_RXD, UART_TXD, GPIO_0, GPIO_1, GPIO_2, GPIO_4, GPIO_7, CFG_SEL, and OTP_DIS.
All other IO signals must remain at VSS until VDDO is applied. Failing to do this can result in unreliable startup behavior.
When powered on, using REG_EN is the same as applying power to the CYW20710. The device does not have information about
its state before being powered-down.
Document No. 002-14804 Rev. *H
Page 13 of 50
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