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BCM20706UA1KFFB4G 参数 Datasheet PDF下载

BCM20706UA1KFFB4G图片预览
型号: BCM20706UA1KFFB4G
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, CMOS, PBGA49, 4.50 X 4 MM, ROHS COMPLIANT, FBGA-49]
分类和应用: 电信电信集成电路
文件页数/大小: 58 页 / 1297 K
品牌: CYPRESS [ CYPRESS ]
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BCM20706 Data Sheet  
Timing and AC Characteristics  
2
I S Timing  
2
2
The I S interface supports both master and slave modes. The I S signals are:  
2
2
I S clock: I S SCK  
2
2
I S Word Select: I S WS  
2
2
I S Data Out: I S SDO  
2
2
I S Data In: I S SDI  
2
2
2
I S SCK and I S WS become outputs in master mode and inputs in slave mode, while I S SDO always stays  
as an output. The channel word length is 16 bits and the data is justified so that the MSB of the left-channel data  
2
2
is aligned with the MSB of the I S bus, per the I S specification. The MSB of each data word is transmitted one  
bit clock cycle after the I S WS transition, synchronous with the falling edge of bit clock. Left-channel data is  
transmitted when I S WS is low, and right-channel data is transmitted when I S WS is high. Data bits sent by  
the BCM20706 are synchronized with the falling edge of I2S_SCK and should be sampled by the receiver on  
the rising edge of I2S_SSCK.  
2
2
2
The clock rate in master mode is either of the following:  
48 kHz x 32 bits per frame = 1.536 MHz  
48 kHz x 50 bits per frame = 2.400 MHz  
The master clock is generated from the input reference clock using a N/M clock divider.  
In the slave mode, any clock rate is supported to a maximum of 3.072 MHz.  
Note: Timing values specified in Table 25 are relative to high and low threshold levels.  
Broadcom®  
Bluetooth SoC  
May 19, 2016 • 20706-DS202-R  
Page 49  
BROADCOM CONFIDENTIAL