8.10 ISO IN Response with No Data
The ISOSEND0 bit (bit 7 in the USBPAIR register) is used when the EZ-USB chip
receives an isochronous IN token while the IN FIFO is empty. If ISOSEND0=0 (the
default value) the EZ-USB core does not respond to the IN token. If ISOSEND0=1, the
EZ-USB core sends a zero-length data packet in response to the IN token. Which action to
take depends on the overall system design. The ISOSEND0 bit applies to all of the isoch-
ronous IN endpoints, IN-8 through IN-15.
8.11 Using the Isochronous FIFOs
There is a window of time before and after each SOF (Start of Frame) when accessing the
Isochronous FIFOs will cause data corruption or loss of data.
This is because each isochronous endpoint is actually a pair of FIFOs, and the FIFOs are
swapped at SOF time. The swap occurs about 10 µs before the SOF interrupt signals the
8051 code. (Between SOFs, one FIFO of the pair is accessible to the 8051, while the other
FIFO of the pair transfers data to or from the USB.)
Workaround#1: If you can pre-assemble the data into a buffer, blast the data (in a tight
loop) into the new FIFO just after the SOF interrupt, typically inside the SOF ISR (Inter-
rupt Service Routine).
Workaround#2: If you can’t pre-assemble the data into a buffer, prevent access during
SOFs by setting a time (in the SOF ISR) to time out and halt access just before the next
SOF. Set the timer for about 950 µs (ms minus 50 µs).
Be careful of interrupt latency delaying the timeout ISR. That is, the timeout ISR may be
prevented from halting access by getting preempted by a higher priority interrupt(s), made
worse by the necessary practice of disabling interrupts to manage shared resources,
resources that are shared between the ISRs and background process.
To prevent drift of the timer relative to SOFs, restart the timer after each SOF (typically in
the SOF ISR).
EZ-USB TRM v1.9
Chapter 8. EZ-USB CPU
Page 8-17
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