ISOCTL register bits shown as MBZ (must be zero) must be written with zeros. The
PPSTAT bit toggles every SOF, and may be written with any value (no effect). Therefore,
to disable the isochronous endpoints, the 8051 should write the value 0x01 to the ISOCTL
register.
Caution!
If you use this option, be absolutely certain that the host never sends isochronous data to
your device. Isochronous data directed to a disabled isochronous endpoint system will
cause unpredictable operation.
Note
The Autopointer is not usable from 0x2000-0x27FF (the reclaimed ISO buffer RAM)
when ISODISAB=1.
8.9.2 Zero Byte Count Bits
When the SOF interrupt is asserted, the 8051 normally checks the isochronous OUT end-
point FIFOs for data. Before reading the byte count registers and unloading an isochro-
nous FIFO, the firmware may wish to check for a zero byte count. In this case, the 8051
can check bits in the ZBCOUT register. Any endpoint bit set to “1” indicates that no OUT
bytes were received for that endpoint during the previous frame. Figure 8-15 shows this
register.
ZBCOUT
Zero Byte Count Bits
7FA2
b7
b6
b5
b4
b3
b2
b1
b0
EP15
EP14
EP13
EP12
EP11
EP10
EP9
EP8
Figure 8-15. ZBCOUT Register
The EZ-USB core updates these bits every SOF.
Page 8-16
Chapter 8. EZ-USB CPU
EZ-USB TRM v1.9
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