Registers Associated with an ISO OUT endpoint
(EP15OUT shown as example)
Data transfer
Initialization
7
6
5
4
3
2
1
1
0
0
14 13 12 11 10
9
15
8
OUT15DATA
USBIRQ
OUTISOVAL
OUT15ADDR
USBIEN
Data from USB
Endpoint Valid (1=valid)
A9 A8 A7 A6 A5 A4
0
0
7
6
5
4
3
2
FIFO Start Address (see text)
SOFIR (1=clear request)
7
6
5
4
3
2
1
0
OUT15BCH
OUT15BCL
7
7
6
5
4
3
2
9
8
0
SOFIE (1=enabled)
Received Byte Count (H)
6
5
4
3
2
1
Received Byte Count (L)
15 14 13 12 11 10
9
8
ISOERR
OUT15 CRC Error (1=error)
Figure 8-3. Isochronous OUT Registers
8.3.1 Initialization
To initialize an isochronous OUT endpoint, the 8051:
•
•
Sets the endpoint valid bit for the endpoint.
Sets the endpoint’s FIFO size by loading a starting address (Section 8.4, "Setting
Isochronous FIFO Sizes").
•
Enables the SOF interrupt. All isochronous endpoints are serviced in response to
the SOF interrupt.
8.3.2 OUT Data Transfer
When an SOF interrupt occurs, the 8051 is presented with FIFOs containing OUT data
sent from the host in the previous frame, along with 10-bit byte counts, indicating how
many bytes are in the FIFOs. The 8051 has 1 ms to transfer data out of these FIFOs before
the next SOF interrupt arrives.
Page 8-4
Chapter 8. EZ-USB CPU
EZ-USB TRM v1.9
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