USE ULTRA37000
TM
FOR
ALL NEW DESIGNS
External Synchronous Switching Characteristics
Over Operating Range
Parameter
t
PD1
t
PD2
t
PD3
t
PD4
t
EA
t
ER
t
CO1
t
CO2
t
S
t
H
t
WH
t
WL
t
RW
t
RR
t
RO
t
PW
t
PR
Description
Dedicated Input to Combinatorial Output Delay
I/O Input to Combinatorial Output Delay
Dedicated Input to Combinatorial Output Delay
with Expander Delay
I/O Input to Combinatorial Output Delay with
Expander Delay
Input to Output Enable Delay
Input to Output Disable Delay
Synchronous Clock Input to Output Delay
Synchronous Clock to Local Feedback to
Combinatorial Output
Dedicated Input or Feedback Set-Up Time to
Synchronous Clock Input
CY7C344
7C344-20
Min.
Max.
20
20
20
20
30
30
30
30
20
20
20
20
12
12
22
22
12
12
0
0
7
7
7
7
20
20
20
20
15
15
20
20
20
20
20
20
25
25
25
25
ns
15
15
0
0
8
8
8
8
25
25
25
25
25
25
ns
ns
ns
ns
ns
ns
ns
7C344-25
Min.
Max.
25
25
25
25
40
40
40
40
25
25
25
25
15
15
29
29
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
7C344-15
Min.
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Mil
Synchronous Clock Input HIGH Time
Synchronous Clock Input LOW Time
Asynchronous Clear Width
Asynchronous Clear Recovery
Time
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Asynchronous Clear to Registered Output
Delay
Asynchronous Preset
Width
Com’l/Ind
Mil
Com’l /Ind
Mil
Asynchronous Preset Recovery Time
Com’l /Ind
Mil
20
20
20
20
10
10
0
0
6
6
6
6
20
20
20
20
Max.
15
15
15
15
30
30
30
30
20
20
20
20
10
10
20
20
Input Hold Time from Synchronous Clock Input
Com’l/Ind
Notes:
8. This parameter is the delay from an input signal applied to a dedicated input pin to a combinatorial output on any output pin. This delay assumes no expander
terms are used to form the logic function.
9. This parameter is the delay associated with an input signal applied to an I/O macrocell pin to any output. This delay assumes no expander terms are used to
form the logic function.
10. This parameter is the delay associated with an input signal applied to a dedicated input pin to combinatorial output on any output pin. This delay assumes
expander terms are used to form the logic function and includes the worst-case expander logic delay for one pass through the expander logic. This parameter
is tested periodically by sampling production material.
11. This parameter is the delay associated with an input signal applied to an I/O macrocell pin to any output pin. This delay assumes expander terms are used to
form the logic function and includes the worst-case expander logic delay for one pass through the expander logic. This parameter is tested periodically by
sampling production material.
12. This specification is a measure of the delay from synchronous register clock input to internal feedback of the register output signal to a combinatorial output for
which the registered output signal is used as an input. This parameter assumes no expanders are used in the logic of the combinatorial output and the register
is synchronously clocked. This parameter is tested periodically by sampling production material.
Document #: 38-03006 Rev. *B
Page 4 of 15
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