CPLL66-4160-4380
0.60" SQ SMD
ENVIRONMENTAL COMPLIANCE
Parameter
Mechanical Shock
Conditions
MIL-STD-883, Method 2002
MIL-STD-883, Method 2007
MIL-STD-883, Method 1014
MIL-STD-883, Method 2016
Mechanical Vibration
Solderability
Resistance to Solvents
Programming Guide for CPLL66-XXXX
Introduction
The CPLL66 uses a simple 3 wire interface to program four internal registers. See Figure 1.
Figure 1. Timing Diagram
There are four 24 bit registers that need to be programmed. Which register is written into is
simply controlled by Control Bits C1 and C2. Table I summarizes the Truth Table for Control
Bits C1 and C2.
Table I. C2, C1 Truth Table
Control Bits
C2
0
C1
0
Data Latch
R Counter
0
1
N Counter (A and B)
Function Latch (Including Prescaler)
Initialization Latch
1
0
1
1
Table II shows the details of the four 24 bit registers.
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